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c43ba80082
It's not so usual, but there are still some cases which require pinctrl driver function at arch_initcall time. So register imx23 and imx28 pinctrl driver at postcore_initcall time. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
306 lines
7.8 KiB
C
306 lines
7.8 KiB
C
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-mxs.h"
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enum imx23_pin_enum {
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GPMI_D00 = PINID(0, 0),
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GPMI_D01 = PINID(0, 1),
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GPMI_D02 = PINID(0, 2),
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GPMI_D03 = PINID(0, 3),
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GPMI_D04 = PINID(0, 4),
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GPMI_D05 = PINID(0, 5),
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GPMI_D06 = PINID(0, 6),
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GPMI_D07 = PINID(0, 7),
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GPMI_D08 = PINID(0, 8),
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GPMI_D09 = PINID(0, 9),
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GPMI_D10 = PINID(0, 10),
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GPMI_D11 = PINID(0, 11),
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GPMI_D12 = PINID(0, 12),
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GPMI_D13 = PINID(0, 13),
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GPMI_D14 = PINID(0, 14),
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GPMI_D15 = PINID(0, 15),
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GPMI_CLE = PINID(0, 16),
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GPMI_ALE = PINID(0, 17),
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GPMI_CE2N = PINID(0, 18),
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GPMI_RDY0 = PINID(0, 19),
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GPMI_RDY1 = PINID(0, 20),
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GPMI_RDY2 = PINID(0, 21),
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GPMI_RDY3 = PINID(0, 22),
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GPMI_WPN = PINID(0, 23),
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GPMI_WRN = PINID(0, 24),
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GPMI_RDN = PINID(0, 25),
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AUART1_CTS = PINID(0, 26),
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AUART1_RTS = PINID(0, 27),
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AUART1_RX = PINID(0, 28),
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AUART1_TX = PINID(0, 29),
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I2C_SCL = PINID(0, 30),
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I2C_SDA = PINID(0, 31),
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LCD_D00 = PINID(1, 0),
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LCD_D01 = PINID(1, 1),
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LCD_D02 = PINID(1, 2),
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LCD_D03 = PINID(1, 3),
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LCD_D04 = PINID(1, 4),
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LCD_D05 = PINID(1, 5),
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LCD_D06 = PINID(1, 6),
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LCD_D07 = PINID(1, 7),
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LCD_D08 = PINID(1, 8),
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LCD_D09 = PINID(1, 9),
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LCD_D10 = PINID(1, 10),
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LCD_D11 = PINID(1, 11),
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LCD_D12 = PINID(1, 12),
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LCD_D13 = PINID(1, 13),
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LCD_D14 = PINID(1, 14),
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LCD_D15 = PINID(1, 15),
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LCD_D16 = PINID(1, 16),
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LCD_D17 = PINID(1, 17),
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LCD_RESET = PINID(1, 18),
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LCD_RS = PINID(1, 19),
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LCD_WR = PINID(1, 20),
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LCD_CS = PINID(1, 21),
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LCD_DOTCK = PINID(1, 22),
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LCD_ENABLE = PINID(1, 23),
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LCD_HSYNC = PINID(1, 24),
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LCD_VSYNC = PINID(1, 25),
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PWM0 = PINID(1, 26),
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PWM1 = PINID(1, 27),
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PWM2 = PINID(1, 28),
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PWM3 = PINID(1, 29),
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PWM4 = PINID(1, 30),
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SSP1_CMD = PINID(2, 0),
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SSP1_DETECT = PINID(2, 1),
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SSP1_DATA0 = PINID(2, 2),
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SSP1_DATA1 = PINID(2, 3),
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SSP1_DATA2 = PINID(2, 4),
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SSP1_DATA3 = PINID(2, 5),
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SSP1_SCK = PINID(2, 6),
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ROTARYA = PINID(2, 7),
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ROTARYB = PINID(2, 8),
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EMI_A00 = PINID(2, 9),
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EMI_A01 = PINID(2, 10),
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EMI_A02 = PINID(2, 11),
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EMI_A03 = PINID(2, 12),
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EMI_A04 = PINID(2, 13),
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EMI_A05 = PINID(2, 14),
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EMI_A06 = PINID(2, 15),
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EMI_A07 = PINID(2, 16),
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EMI_A08 = PINID(2, 17),
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EMI_A09 = PINID(2, 18),
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EMI_A10 = PINID(2, 19),
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EMI_A11 = PINID(2, 20),
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EMI_A12 = PINID(2, 21),
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EMI_BA0 = PINID(2, 22),
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EMI_BA1 = PINID(2, 23),
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EMI_CASN = PINID(2, 24),
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EMI_CE0N = PINID(2, 25),
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EMI_CE1N = PINID(2, 26),
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GPMI_CE1N = PINID(2, 27),
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GPMI_CE0N = PINID(2, 28),
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EMI_CKE = PINID(2, 29),
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EMI_RASN = PINID(2, 30),
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EMI_WEN = PINID(2, 31),
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EMI_D00 = PINID(3, 0),
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EMI_D01 = PINID(3, 1),
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EMI_D02 = PINID(3, 2),
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EMI_D03 = PINID(3, 3),
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EMI_D04 = PINID(3, 4),
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EMI_D05 = PINID(3, 5),
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EMI_D06 = PINID(3, 6),
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EMI_D07 = PINID(3, 7),
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EMI_D08 = PINID(3, 8),
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EMI_D09 = PINID(3, 9),
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EMI_D10 = PINID(3, 10),
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EMI_D11 = PINID(3, 11),
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EMI_D12 = PINID(3, 12),
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EMI_D13 = PINID(3, 13),
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EMI_D14 = PINID(3, 14),
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EMI_D15 = PINID(3, 15),
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EMI_DQM0 = PINID(3, 16),
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EMI_DQM1 = PINID(3, 17),
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EMI_DQS0 = PINID(3, 18),
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EMI_DQS1 = PINID(3, 19),
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EMI_CLK = PINID(3, 20),
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EMI_CLKN = PINID(3, 21),
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};
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static const struct pinctrl_pin_desc imx23_pins[] = {
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MXS_PINCTRL_PIN(GPMI_D00),
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MXS_PINCTRL_PIN(GPMI_D01),
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MXS_PINCTRL_PIN(GPMI_D02),
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MXS_PINCTRL_PIN(GPMI_D03),
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MXS_PINCTRL_PIN(GPMI_D04),
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MXS_PINCTRL_PIN(GPMI_D05),
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MXS_PINCTRL_PIN(GPMI_D06),
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MXS_PINCTRL_PIN(GPMI_D07),
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MXS_PINCTRL_PIN(GPMI_D08),
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MXS_PINCTRL_PIN(GPMI_D09),
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MXS_PINCTRL_PIN(GPMI_D10),
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MXS_PINCTRL_PIN(GPMI_D11),
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MXS_PINCTRL_PIN(GPMI_D12),
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MXS_PINCTRL_PIN(GPMI_D13),
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MXS_PINCTRL_PIN(GPMI_D14),
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MXS_PINCTRL_PIN(GPMI_D15),
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MXS_PINCTRL_PIN(GPMI_CLE),
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MXS_PINCTRL_PIN(GPMI_ALE),
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MXS_PINCTRL_PIN(GPMI_CE2N),
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MXS_PINCTRL_PIN(GPMI_RDY0),
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MXS_PINCTRL_PIN(GPMI_RDY1),
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MXS_PINCTRL_PIN(GPMI_RDY2),
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MXS_PINCTRL_PIN(GPMI_RDY3),
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MXS_PINCTRL_PIN(GPMI_WPN),
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MXS_PINCTRL_PIN(GPMI_WRN),
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MXS_PINCTRL_PIN(GPMI_RDN),
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MXS_PINCTRL_PIN(AUART1_CTS),
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MXS_PINCTRL_PIN(AUART1_RTS),
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MXS_PINCTRL_PIN(AUART1_RX),
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MXS_PINCTRL_PIN(AUART1_TX),
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MXS_PINCTRL_PIN(I2C_SCL),
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MXS_PINCTRL_PIN(I2C_SDA),
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MXS_PINCTRL_PIN(LCD_D00),
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MXS_PINCTRL_PIN(LCD_D01),
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MXS_PINCTRL_PIN(LCD_D02),
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MXS_PINCTRL_PIN(LCD_D03),
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MXS_PINCTRL_PIN(LCD_D04),
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MXS_PINCTRL_PIN(LCD_D05),
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MXS_PINCTRL_PIN(LCD_D06),
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MXS_PINCTRL_PIN(LCD_D07),
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MXS_PINCTRL_PIN(LCD_D08),
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MXS_PINCTRL_PIN(LCD_D09),
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MXS_PINCTRL_PIN(LCD_D10),
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MXS_PINCTRL_PIN(LCD_D11),
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MXS_PINCTRL_PIN(LCD_D12),
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MXS_PINCTRL_PIN(LCD_D13),
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MXS_PINCTRL_PIN(LCD_D14),
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MXS_PINCTRL_PIN(LCD_D15),
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MXS_PINCTRL_PIN(LCD_D16),
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MXS_PINCTRL_PIN(LCD_D17),
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MXS_PINCTRL_PIN(LCD_RESET),
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MXS_PINCTRL_PIN(LCD_RS),
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MXS_PINCTRL_PIN(LCD_WR),
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MXS_PINCTRL_PIN(LCD_CS),
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MXS_PINCTRL_PIN(LCD_DOTCK),
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MXS_PINCTRL_PIN(LCD_ENABLE),
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MXS_PINCTRL_PIN(LCD_HSYNC),
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MXS_PINCTRL_PIN(LCD_VSYNC),
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MXS_PINCTRL_PIN(PWM0),
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MXS_PINCTRL_PIN(PWM1),
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MXS_PINCTRL_PIN(PWM2),
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MXS_PINCTRL_PIN(PWM3),
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MXS_PINCTRL_PIN(PWM4),
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MXS_PINCTRL_PIN(SSP1_CMD),
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MXS_PINCTRL_PIN(SSP1_DETECT),
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MXS_PINCTRL_PIN(SSP1_DATA0),
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MXS_PINCTRL_PIN(SSP1_DATA1),
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MXS_PINCTRL_PIN(SSP1_DATA2),
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MXS_PINCTRL_PIN(SSP1_DATA3),
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MXS_PINCTRL_PIN(SSP1_SCK),
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MXS_PINCTRL_PIN(ROTARYA),
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MXS_PINCTRL_PIN(ROTARYB),
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MXS_PINCTRL_PIN(EMI_A00),
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MXS_PINCTRL_PIN(EMI_A01),
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MXS_PINCTRL_PIN(EMI_A02),
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MXS_PINCTRL_PIN(EMI_A03),
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MXS_PINCTRL_PIN(EMI_A04),
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MXS_PINCTRL_PIN(EMI_A05),
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MXS_PINCTRL_PIN(EMI_A06),
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MXS_PINCTRL_PIN(EMI_A07),
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MXS_PINCTRL_PIN(EMI_A08),
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MXS_PINCTRL_PIN(EMI_A09),
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MXS_PINCTRL_PIN(EMI_A10),
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MXS_PINCTRL_PIN(EMI_A11),
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MXS_PINCTRL_PIN(EMI_A12),
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MXS_PINCTRL_PIN(EMI_BA0),
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MXS_PINCTRL_PIN(EMI_BA1),
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MXS_PINCTRL_PIN(EMI_CASN),
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MXS_PINCTRL_PIN(EMI_CE0N),
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MXS_PINCTRL_PIN(EMI_CE1N),
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MXS_PINCTRL_PIN(GPMI_CE1N),
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MXS_PINCTRL_PIN(GPMI_CE0N),
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MXS_PINCTRL_PIN(EMI_CKE),
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MXS_PINCTRL_PIN(EMI_RASN),
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MXS_PINCTRL_PIN(EMI_WEN),
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MXS_PINCTRL_PIN(EMI_D00),
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MXS_PINCTRL_PIN(EMI_D01),
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MXS_PINCTRL_PIN(EMI_D02),
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MXS_PINCTRL_PIN(EMI_D03),
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MXS_PINCTRL_PIN(EMI_D04),
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MXS_PINCTRL_PIN(EMI_D05),
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MXS_PINCTRL_PIN(EMI_D06),
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MXS_PINCTRL_PIN(EMI_D07),
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MXS_PINCTRL_PIN(EMI_D08),
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MXS_PINCTRL_PIN(EMI_D09),
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MXS_PINCTRL_PIN(EMI_D10),
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MXS_PINCTRL_PIN(EMI_D11),
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MXS_PINCTRL_PIN(EMI_D12),
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MXS_PINCTRL_PIN(EMI_D13),
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MXS_PINCTRL_PIN(EMI_D14),
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MXS_PINCTRL_PIN(EMI_D15),
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MXS_PINCTRL_PIN(EMI_DQM0),
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MXS_PINCTRL_PIN(EMI_DQM1),
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MXS_PINCTRL_PIN(EMI_DQS0),
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MXS_PINCTRL_PIN(EMI_DQS1),
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MXS_PINCTRL_PIN(EMI_CLK),
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MXS_PINCTRL_PIN(EMI_CLKN),
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};
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static struct mxs_regs imx23_regs = {
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.muxsel = 0x100,
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.drive = 0x200,
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.pull = 0x400,
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};
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static struct mxs_pinctrl_soc_data imx23_pinctrl_data = {
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.regs = &imx23_regs,
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.pins = imx23_pins,
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.npins = ARRAY_SIZE(imx23_pins),
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};
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static int __devinit imx23_pinctrl_probe(struct platform_device *pdev)
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{
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return mxs_pinctrl_probe(pdev, &imx23_pinctrl_data);
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}
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static struct of_device_id imx23_pinctrl_of_match[] __devinitdata = {
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{ .compatible = "fsl,imx23-pinctrl", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, imx23_pinctrl_of_match);
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static struct platform_driver imx23_pinctrl_driver = {
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.driver = {
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.name = "imx23-pinctrl",
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.owner = THIS_MODULE,
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.of_match_table = imx23_pinctrl_of_match,
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},
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.probe = imx23_pinctrl_probe,
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.remove = __devexit_p(mxs_pinctrl_remove),
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};
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static int __init imx23_pinctrl_init(void)
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{
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return platform_driver_register(&imx23_pinctrl_driver);
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}
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postcore_initcall(imx23_pinctrl_init);
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static void __exit imx23_pinctrl_exit(void)
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{
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platform_driver_unregister(&imx23_pinctrl_driver);
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}
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module_exit(imx23_pinctrl_exit);
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MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
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MODULE_DESCRIPTION("Freescale i.MX23 pinctrl driver");
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MODULE_LICENSE("GPL v2");
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