mirror of
https://github.com/torvalds/linux.git
synced 2024-11-19 02:21:47 +00:00
d5341942d7
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: "David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: Paul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
/*
|
|
* arch/arch/mach-ixp4xx/vulcan-pci.c
|
|
*
|
|
* Vulcan board-level PCI initialization
|
|
*
|
|
* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
|
|
*
|
|
* based on ixdp425-pci.c:
|
|
* Copyright (C) 2002 Intel Corporation.
|
|
* Copyright (C) 2003-2004 MontaVista Software, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
*/
|
|
|
|
#include <linux/pci.h>
|
|
#include <linux/init.h>
|
|
#include <linux/irq.h>
|
|
#include <asm/mach/pci.h>
|
|
#include <asm/mach-types.h>
|
|
|
|
/* PCI controller GPIO to IRQ pin mappings */
|
|
#define INTA 2
|
|
#define INTB 3
|
|
|
|
void __init vulcan_pci_preinit(void)
|
|
{
|
|
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
|
|
/*
|
|
* Cardbus bridge wants way more than the SoC can actually offer,
|
|
* and leaves the whole PCI bus in a mess. Artificially limit it
|
|
* to 8MB per region. Of course indirect mode doesn't have this
|
|
* limitation...
|
|
*/
|
|
pci_cardbus_mem_size = SZ_8M;
|
|
pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
|
|
(int)(pci_cardbus_mem_size >> 20));
|
|
#endif
|
|
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
|
|
ixp4xx_pci_preinit();
|
|
}
|
|
|
|
static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
{
|
|
if (slot == 1)
|
|
return IXP4XX_GPIO_IRQ(INTA);
|
|
|
|
if (slot == 2)
|
|
return IXP4XX_GPIO_IRQ(INTB);
|
|
|
|
return -1;
|
|
}
|
|
|
|
struct hw_pci vulcan_pci __initdata = {
|
|
.nr_controllers = 1,
|
|
.preinit = vulcan_pci_preinit,
|
|
.swizzle = pci_std_swizzle,
|
|
.setup = ixp4xx_setup,
|
|
.scan = ixp4xx_scan_bus,
|
|
.map_irq = vulcan_map_irq,
|
|
};
|
|
|
|
int __init vulcan_pci_init(void)
|
|
{
|
|
if (machine_is_arcom_vulcan())
|
|
pci_common_init(&vulcan_pci);
|
|
return 0;
|
|
}
|
|
|
|
subsys_initcall(vulcan_pci_init);
|