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35a17eb6a8
This is kind of hokey, we could use the hardware provided facilities
much better.
MSIs are assosciated with MSI Queues. MSI Queues generate interrupts
when any MSI assosciated with it is signalled. This suggests a
two-tiered IRQ dispatch scheme:
MSI Queue interrupt --> queue interrupt handler
MSI dispatch --> driver interrupt handler
But we just get one-level under Linux currently. What I'd like to do
is possibly stick the IRQ actions into a per-MSI-Queue data structure,
and dispatch them form there, but the generic IRQ layer doesn't
provide a way to do that right now.
So, the current kludge is to "ACK" the interrupt by processing the
MSI Queue data structures and ACK'ing them, then we run the actual
handler like normal.
We are wasting a lot of useful information, for example the MSI data
and address are provided with ever MSI, as well as a system tick if
available. If we could pass this into the IRQ handler it could help
with certain things, in particular for PCI-Express error messages.
The MSI entries on sparc64 also tell you exactly which bus/device/fn
sent the MSI, which would be great for error handling when no
registered IRQ handler can service the interrupt.
We override the disable/enable IRQ chip methods in sun4v_msi, so we
have to call {mask,unmask}_msi_irq() directly from there. This is
another ugly wart.
Signed-off-by: David S. Miller <davem@davemloft.net>
362 lines
6.0 KiB
ArmAsm
362 lines
6.0 KiB
ArmAsm
/* pci_sun4v_asm: Hypervisor calls for PCI support.
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*
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* Copyright (C) 2006 David S. Miller <davem@davemloft.net>
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*/
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#include <asm/hypervisor.h>
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/* %o0: devhandle
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* %o1: tsbid
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* %o2: num ttes
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* %o3: io_attributes
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* %o4: io_page_list phys address
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*
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* returns %o0: -status if status was non-zero, else
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* %o0: num pages mapped
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*/
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.globl pci_sun4v_iommu_map
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pci_sun4v_iommu_map:
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mov %o5, %g1
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mov HV_FAST_PCI_IOMMU_MAP, %o5
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ta HV_FAST_TRAP
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brnz,pn %o0, 1f
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sub %g0, %o0, %o0
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mov %o1, %o0
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1: retl
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nop
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/* %o0: devhandle
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* %o1: tsbid
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* %o2: num ttes
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*
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* returns %o0: num ttes demapped
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*/
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.globl pci_sun4v_iommu_demap
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pci_sun4v_iommu_demap:
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mov HV_FAST_PCI_IOMMU_DEMAP, %o5
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ta HV_FAST_TRAP
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retl
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mov %o1, %o0
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/* %o0: devhandle
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* %o1: tsbid
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* %o2: &io_attributes
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* %o3: &real_address
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_iommu_getmap
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pci_sun4v_iommu_getmap:
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mov %o2, %o4
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mov HV_FAST_PCI_IOMMU_GETMAP, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o4]
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stx %o2, [%o3]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: pci_device
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* %o2: pci_config_offset
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* %o3: size
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*
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* returns %o0: data
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*
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* If there is an error, the data will be returned
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* as all 1's.
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*/
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.globl pci_sun4v_config_get
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pci_sun4v_config_get:
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mov HV_FAST_PCI_CONFIG_GET, %o5
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ta HV_FAST_TRAP
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brnz,a,pn %o1, 1f
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mov -1, %o2
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1: retl
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mov %o2, %o0
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/* %o0: devhandle
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* %o1: pci_device
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* %o2: pci_config_offset
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* %o3: size
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* %o4: data
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*
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* returns %o0: status
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*
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* status will be zero if the operation completed
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* successfully, else -1 if not
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*/
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.globl pci_sun4v_config_put
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pci_sun4v_config_put:
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mov HV_FAST_PCI_CONFIG_PUT, %o5
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ta HV_FAST_TRAP
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brnz,a,pn %o1, 1f
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mov -1, %o1
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1: retl
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mov %o1, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: msiq phys address
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* %o3: num entries
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*
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* returns %o0: status
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*
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* status will be zero if the operation completed
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* successfully, else -1 if not
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*/
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.globl pci_sun4v_msiq_conf
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pci_sun4v_msiq_conf:
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mov HV_FAST_PCI_MSIQ_CONF, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: &msiq_phys_addr
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* %o3: &msiq_num_entries
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_info
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pci_sun4v_msiq_info:
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mov %o2, %o4
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mov HV_FAST_PCI_MSIQ_INFO, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o4]
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stx %o2, [%o3]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: &valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_getvalid
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pci_sun4v_msiq_getvalid:
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mov HV_FAST_PCI_MSIQ_GETVALID, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_setvalid
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pci_sun4v_msiq_setvalid:
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mov HV_FAST_PCI_MSIQ_SETVALID, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: &state
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_getstate
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pci_sun4v_msiq_getstate:
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mov HV_FAST_PCI_MSIQ_GETSTATE, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: state
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_setstate
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pci_sun4v_msiq_setstate:
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mov HV_FAST_PCI_MSIQ_SETSTATE, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: &head
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_gethead
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pci_sun4v_msiq_gethead:
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mov HV_FAST_PCI_MSIQ_GETHEAD, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: head
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_sethead
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pci_sun4v_msiq_sethead:
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mov HV_FAST_PCI_MSIQ_SETHEAD, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msiqid
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* %o2: &tail
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msiq_gettail
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pci_sun4v_msiq_gettail:
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mov HV_FAST_PCI_MSIQ_GETTAIL, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: &valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_getvalid
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pci_sun4v_msi_getvalid:
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mov HV_FAST_PCI_MSI_GETVALID, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_setvalid
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pci_sun4v_msi_setvalid:
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mov HV_FAST_PCI_MSI_SETVALID, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: &msiq
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_getmsiq
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pci_sun4v_msi_getmsiq:
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mov HV_FAST_PCI_MSI_GETMSIQ, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: msitype
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* %o3: msiq
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_setmsiq
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pci_sun4v_msi_setmsiq:
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mov HV_FAST_PCI_MSI_SETMSIQ, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: &state
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_getstate
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pci_sun4v_msi_getstate:
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mov HV_FAST_PCI_MSI_GETSTATE, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: state
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msi_setstate
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pci_sun4v_msi_setstate:
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mov HV_FAST_PCI_MSI_SETSTATE, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: &msiq
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msg_getmsiq
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pci_sun4v_msg_getmsiq:
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mov HV_FAST_PCI_MSG_GETMSIQ, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: msiq
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msg_setmsiq
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pci_sun4v_msg_setmsiq:
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mov HV_FAST_PCI_MSG_SETMSIQ, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: &valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msg_getvalid
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pci_sun4v_msg_getvalid:
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mov HV_FAST_PCI_MSG_GETVALID, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o2]
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retl
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mov %o0, %o0
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/* %o0: devhandle
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* %o1: msinum
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* %o2: valid
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*
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* returns %o0: status
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*/
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.globl pci_sun4v_msg_setvalid
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pci_sun4v_msg_setvalid:
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mov HV_FAST_PCI_MSG_SETVALID, %o5
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ta HV_FAST_TRAP
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retl
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mov %o0, %o0
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