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4bdc0d676a
ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
472 lines
12 KiB
C
472 lines
12 KiB
C
/*
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* Linux driver attachment glue for PCI based controllers.
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*
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* Copyright (c) 2000-2001 Adaptec Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
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*/
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#include "aic7xxx_osm.h"
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#include "aic7xxx_pci.h"
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/* Define the macro locally since it's different for different class of chips.
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*/
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#define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI)
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static const struct pci_device_id ahc_linux_pci_id_table[] = {
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/* aic7850 based controllers */
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ID(ID_AHA_2902_04_10_15_20C_30C),
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/* aic7860 based controllers */
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ID(ID_AHA_2930CU),
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ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
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/* aic7870 based controllers */
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ID(ID_AHA_2940),
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ID(ID_AHA_3940),
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ID(ID_AHA_398X),
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ID(ID_AHA_2944),
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ID(ID_AHA_3944),
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ID(ID_AHA_4944),
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/* aic7880 based controllers */
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ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
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ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
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/* aic7890 based controllers */
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ID(ID_AHA_2930U2),
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ID(ID_AHA_2940U2B),
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ID(ID_AHA_2940U2_OEM),
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ID(ID_AHA_2940U2),
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ID(ID_AHA_2950U2B),
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ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
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ID(ID_AAA_131U2),
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/* aic7890 based controllers */
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ID(ID_AHA_29160),
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ID(ID_AHA_29160_CPQ),
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ID(ID_AHA_29160N),
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ID(ID_AHA_29160C),
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ID(ID_AHA_29160B),
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ID(ID_AHA_19160B),
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ID(ID_AIC7892_ARO),
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/* aic7892 based controllers */
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ID(ID_AHA_2940U_DUAL),
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ID(ID_AHA_3940AU),
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ID(ID_AHA_3944AU),
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ID(ID_AIC7895_ARO),
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ID(ID_AHA_3950U2B_0),
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ID(ID_AHA_3950U2B_1),
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ID(ID_AHA_3950U2D_0),
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ID(ID_AHA_3950U2D_1),
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ID(ID_AIC7896_ARO),
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/* aic7899 based controllers */
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ID(ID_AHA_3960D),
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ID(ID_AHA_3960D_CPQ),
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ID(ID_AIC7899_ARO),
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/* Generic chip probes for devices we don't know exactly. */
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ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
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ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
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ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
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ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
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ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
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ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
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ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
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ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
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{ 0 }
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};
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MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
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#ifdef CONFIG_PM
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static int
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ahc_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
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{
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struct ahc_softc *ahc = pci_get_drvdata(pdev);
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int rc;
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if ((rc = ahc_suspend(ahc)))
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return rc;
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pci_save_state(pdev);
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pci_disable_device(pdev);
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if (mesg.event & PM_EVENT_SLEEP)
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pci_set_power_state(pdev, PCI_D3hot);
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return rc;
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}
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static int
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ahc_linux_pci_dev_resume(struct pci_dev *pdev)
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{
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struct ahc_softc *ahc = pci_get_drvdata(pdev);
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int rc;
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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if ((rc = pci_enable_device(pdev))) {
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dev_printk(KERN_ERR, &pdev->dev,
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"failed to enable device after resume (%d)\n", rc);
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return rc;
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}
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pci_set_master(pdev);
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ahc_pci_resume(ahc);
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return (ahc_resume(ahc));
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}
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#endif
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static void
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ahc_linux_pci_dev_remove(struct pci_dev *pdev)
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{
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struct ahc_softc *ahc = pci_get_drvdata(pdev);
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u_long s;
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if (ahc->platform_data && ahc->platform_data->host)
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scsi_remove_host(ahc->platform_data->host);
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ahc_lock(ahc, &s);
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ahc_intr_enable(ahc, FALSE);
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ahc_unlock(ahc, &s);
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ahc_free(ahc);
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}
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static void
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ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
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{
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struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
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unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
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master_pdev = pci_get_slot(pdev->bus, master_devfn);
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if (master_pdev) {
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struct ahc_softc *master = pci_get_drvdata(master_pdev);
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if (master) {
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ahc->flags &= ~AHC_BIOS_ENABLED;
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ahc->flags |= master->flags & AHC_BIOS_ENABLED;
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ahc->flags &= ~AHC_PRIMARY_CHANNEL;
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ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
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} else
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printk(KERN_ERR "aic7xxx: no multichannel peer found!\n");
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pci_dev_put(master_pdev);
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}
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}
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static int
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ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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char buf[80];
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const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
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struct ahc_softc *ahc;
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ahc_dev_softc_t pci;
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const struct ahc_pci_identity *entry;
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char *name;
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int error;
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struct device *dev = &pdev->dev;
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pci = pdev;
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entry = ahc_find_pci_device(pci);
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if (entry == NULL)
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return (-ENODEV);
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/*
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* Allocate a softc for this card and
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* set it up for attachment by our
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* common detect routine.
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*/
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sprintf(buf, "ahc_pci:%d:%d:%d",
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ahc_get_pci_bus(pci),
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ahc_get_pci_slot(pci),
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ahc_get_pci_function(pci));
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name = kstrdup(buf, GFP_ATOMIC);
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if (name == NULL)
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return (-ENOMEM);
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ahc = ahc_alloc(NULL, name);
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if (ahc == NULL)
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return (-ENOMEM);
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if (pci_enable_device(pdev)) {
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ahc_free(ahc);
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return (-ENODEV);
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}
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pci_set_master(pdev);
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if (sizeof(dma_addr_t) > 4
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&& ahc->features & AHC_LARGE_SCBS
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&& dma_set_mask(dev, mask_39bit) == 0
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&& dma_get_required_mask(dev) > DMA_BIT_MASK(32)) {
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ahc->flags |= AHC_39BIT_ADDRESSING;
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} else {
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if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
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ahc_free(ahc);
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printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
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return (-ENODEV);
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}
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}
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ahc->dev_softc = pci;
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ahc->dev = &pci->dev;
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error = ahc_pci_config(ahc, entry);
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if (error != 0) {
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ahc_free(ahc);
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return (-error);
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}
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/*
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* Second Function PCI devices need to inherit some
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* settings from function 0.
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*/
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if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
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ahc_linux_pci_inherit_flags(ahc);
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pci_set_drvdata(pdev, ahc);
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ahc_linux_register_host(ahc, &aic7xxx_driver_template);
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return (0);
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}
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/******************************* PCI Routines *********************************/
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uint32_t
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ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
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{
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switch (width) {
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case 1:
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{
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uint8_t retval;
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pci_read_config_byte(pci, reg, &retval);
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return (retval);
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}
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case 2:
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{
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uint16_t retval;
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pci_read_config_word(pci, reg, &retval);
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return (retval);
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}
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case 4:
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{
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uint32_t retval;
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pci_read_config_dword(pci, reg, &retval);
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return (retval);
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}
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default:
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panic("ahc_pci_read_config: Read size too big");
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/* NOTREACHED */
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return (0);
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}
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}
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void
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ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
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{
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switch (width) {
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case 1:
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pci_write_config_byte(pci, reg, value);
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break;
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case 2:
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pci_write_config_word(pci, reg, value);
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break;
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case 4:
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pci_write_config_dword(pci, reg, value);
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break;
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default:
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panic("ahc_pci_write_config: Write size too big");
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/* NOTREACHED */
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}
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}
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static struct pci_driver aic7xxx_pci_driver = {
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.name = "aic7xxx",
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.probe = ahc_linux_pci_dev_probe,
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#ifdef CONFIG_PM
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.suspend = ahc_linux_pci_dev_suspend,
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.resume = ahc_linux_pci_dev_resume,
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#endif
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.remove = ahc_linux_pci_dev_remove,
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.id_table = ahc_linux_pci_id_table
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};
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int
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ahc_linux_pci_init(void)
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{
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return pci_register_driver(&aic7xxx_pci_driver);
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}
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void
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ahc_linux_pci_exit(void)
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{
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pci_unregister_driver(&aic7xxx_pci_driver);
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}
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static int
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ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, resource_size_t *base)
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{
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if (aic7xxx_allow_memio == 0)
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return (ENOMEM);
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*base = pci_resource_start(ahc->dev_softc, 0);
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if (*base == 0)
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return (ENOMEM);
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if (!request_region(*base, 256, "aic7xxx"))
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return (ENOMEM);
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return (0);
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}
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static int
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ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
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resource_size_t *bus_addr,
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uint8_t __iomem **maddr)
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{
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resource_size_t start;
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int error;
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error = 0;
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start = pci_resource_start(ahc->dev_softc, 1);
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if (start != 0) {
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*bus_addr = start;
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if (!request_mem_region(start, 0x1000, "aic7xxx"))
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error = ENOMEM;
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if (error == 0) {
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*maddr = ioremap(start, 256);
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if (*maddr == NULL) {
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error = ENOMEM;
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release_mem_region(start, 0x1000);
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}
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}
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} else
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error = ENOMEM;
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return (error);
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}
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int
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ahc_pci_map_registers(struct ahc_softc *ahc)
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{
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uint32_t command;
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resource_size_t base;
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uint8_t __iomem *maddr;
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int error;
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/*
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* If its allowed, we prefer memory mapped access.
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*/
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command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
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command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
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base = 0;
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maddr = NULL;
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error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
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if (error == 0) {
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ahc->platform_data->mem_busaddr = base;
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ahc->tag = BUS_SPACE_MEMIO;
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ahc->bsh.maddr = maddr;
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ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
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command | PCIM_CMD_MEMEN, 4);
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/*
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* Do a quick test to see if memory mapped
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* I/O is functioning correctly.
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*/
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if (ahc_pci_test_register_access(ahc) != 0) {
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printk("aic7xxx: PCI Device %d:%d:%d "
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"failed memory mapped test. Using PIO.\n",
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ahc_get_pci_bus(ahc->dev_softc),
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ahc_get_pci_slot(ahc->dev_softc),
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ahc_get_pci_function(ahc->dev_softc));
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iounmap(maddr);
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release_mem_region(ahc->platform_data->mem_busaddr,
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0x1000);
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ahc->bsh.maddr = NULL;
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maddr = NULL;
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} else
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command |= PCIM_CMD_MEMEN;
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} else {
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printk("aic7xxx: PCI%d:%d:%d MEM region 0x%llx "
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"unavailable. Cannot memory map device.\n",
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ahc_get_pci_bus(ahc->dev_softc),
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ahc_get_pci_slot(ahc->dev_softc),
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ahc_get_pci_function(ahc->dev_softc),
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(unsigned long long)base);
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}
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/*
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* We always prefer memory mapped access.
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*/
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if (maddr == NULL) {
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error = ahc_linux_pci_reserve_io_region(ahc, &base);
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if (error == 0) {
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ahc->tag = BUS_SPACE_PIO;
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ahc->bsh.ioport = (u_long)base;
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command |= PCIM_CMD_PORTEN;
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} else {
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printk("aic7xxx: PCI%d:%d:%d IO region 0x%llx[0..255] "
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"unavailable. Cannot map device.\n",
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ahc_get_pci_bus(ahc->dev_softc),
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ahc_get_pci_slot(ahc->dev_softc),
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ahc_get_pci_function(ahc->dev_softc),
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(unsigned long long)base);
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}
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}
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ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
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return (error);
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}
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int
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ahc_pci_map_int(struct ahc_softc *ahc)
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{
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int error;
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error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
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IRQF_SHARED, "aic7xxx", ahc);
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if (error == 0)
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ahc->platform_data->irq = ahc->dev_softc->irq;
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return (-error);
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}
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