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af3c8d9850
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZYseIAAoJEAx081l5xIa+85kP/0zKzKKVzZXSXG2TAGb5jNfk Ex+TELG8tWk9KBxA7lEE5c0WEsnP79cNoXZLQu8wlUzO8+kwQK5Bz0zgNUkpSuo1 RthwdsxBQX1++UxB+HoSG+dOa7hkKVqlgQR3z9qyhsBXzetkJV0DoYcpMV0A1EWd 6Jzt+AvCShVkcW+21LqHPlc5EIVewrDMoA3oU6aYCLhyAOUTVvvQB2ML8YApH7TM JrSrzCFHTrQEBbGUrZQhzR0sZzZzk9byntb/I/mdVbHeCyIHiL8sC4PfWSOyyazm GkPnA8G3aFAY9haBRz9jG/VBr1yVb0mCBjkWQ1lGfIAOCDDSc+d7PDXdG+i4AewK jZheXlrDIdGgmJLy4W3rdEqJvdf7UQHZOs8594OL19l4+FxCTrol1JSHSMeavCvr 8bUNil9Jb/ONU/wmp+q55U0k4TCTyerUA7gKnuaJAwBvd4n78/PKmQnbrWinDyJc GQXp6zESk9bKt5DXSnVZuVf4POTzpuAsQkkfX1V2y145EHTQYfS3jLENWqEjyZUy QtKCHZvRkJfGaFU4Pr+vBo9Iu1GlA5OiOv08QadldTT4OxUI0T6yaLDobHCQfKPE sc3wCuCM+/dAnqoKDcGC4hAmF8zDdO0kw65P2m7uC6T9Jm1G35CioKbzo+fzUhuL fg5TBpbp2Wwe2oPA5iBm =2S5N -----END PGP SIGNATURE----- Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ...
497 lines
11 KiB
C
497 lines
11 KiB
C
/*
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* (C) Copyright 2016 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <linux/slab.h>
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#include <linux/dma-fence.h>
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#include <linux/reservation.h>
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#include "i915_sw_fence.h"
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#include "i915_selftest.h"
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#define I915_SW_FENCE_FLAG_ALLOC BIT(3) /* after WQ_FLAG_* for safety */
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static DEFINE_SPINLOCK(i915_sw_fence_lock);
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enum {
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DEBUG_FENCE_IDLE = 0,
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DEBUG_FENCE_NOTIFY,
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};
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#ifdef CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS
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static void *i915_sw_fence_debug_hint(void *addr)
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{
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return (void *)(((struct i915_sw_fence *)addr)->flags & I915_SW_FENCE_MASK);
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}
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static struct debug_obj_descr i915_sw_fence_debug_descr = {
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.name = "i915_sw_fence",
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.debug_hint = i915_sw_fence_debug_hint,
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};
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static inline void debug_fence_init(struct i915_sw_fence *fence)
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{
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debug_object_init(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_activate(struct i915_sw_fence *fence)
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{
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debug_object_activate(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_set_state(struct i915_sw_fence *fence,
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int old, int new)
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{
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debug_object_active_state(fence, &i915_sw_fence_debug_descr, old, new);
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}
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static inline void debug_fence_deactivate(struct i915_sw_fence *fence)
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{
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debug_object_deactivate(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_destroy(struct i915_sw_fence *fence)
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{
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debug_object_destroy(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_free(struct i915_sw_fence *fence)
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{
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debug_object_free(fence, &i915_sw_fence_debug_descr);
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smp_wmb(); /* flush the change in state before reallocation */
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}
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static inline void debug_fence_assert(struct i915_sw_fence *fence)
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{
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debug_object_assert_init(fence, &i915_sw_fence_debug_descr);
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}
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#else
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static inline void debug_fence_init(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_activate(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_set_state(struct i915_sw_fence *fence,
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int old, int new)
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{
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}
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static inline void debug_fence_deactivate(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_destroy(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_free(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_assert(struct i915_sw_fence *fence)
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{
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}
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#endif
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static int __i915_sw_fence_notify(struct i915_sw_fence *fence,
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enum i915_sw_fence_notify state)
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{
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i915_sw_fence_notify_t fn;
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fn = (i915_sw_fence_notify_t)(fence->flags & I915_SW_FENCE_MASK);
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return fn(fence, state);
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}
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#ifdef CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS
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void i915_sw_fence_fini(struct i915_sw_fence *fence)
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{
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debug_fence_free(fence);
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}
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#endif
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static void __i915_sw_fence_wake_up_all(struct i915_sw_fence *fence,
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struct list_head *continuation)
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{
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wait_queue_head_t *x = &fence->wait;
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wait_queue_entry_t *pos, *next;
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unsigned long flags;
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debug_fence_deactivate(fence);
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atomic_set_release(&fence->pending, -1); /* 0 -> -1 [done] */
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/*
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* To prevent unbounded recursion as we traverse the graph of
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* i915_sw_fences, we move the entry list from this, the next ready
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* fence, to the tail of the original fence's entry list
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* (and so added to the list to be woken).
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*/
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spin_lock_irqsave_nested(&x->lock, flags, 1 + !!continuation);
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if (continuation) {
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list_for_each_entry_safe(pos, next, &x->head, entry) {
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if (pos->func == autoremove_wake_function)
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pos->func(pos, TASK_NORMAL, 0, continuation);
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else
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list_move_tail(&pos->entry, continuation);
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}
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} else {
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LIST_HEAD(extra);
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do {
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list_for_each_entry_safe(pos, next, &x->head, entry)
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pos->func(pos, TASK_NORMAL, 0, &extra);
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if (list_empty(&extra))
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break;
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list_splice_tail_init(&extra, &x->head);
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} while (1);
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}
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spin_unlock_irqrestore(&x->lock, flags);
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debug_fence_assert(fence);
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}
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static void __i915_sw_fence_complete(struct i915_sw_fence *fence,
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struct list_head *continuation)
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{
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debug_fence_assert(fence);
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if (!atomic_dec_and_test(&fence->pending))
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return;
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debug_fence_set_state(fence, DEBUG_FENCE_IDLE, DEBUG_FENCE_NOTIFY);
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if (__i915_sw_fence_notify(fence, FENCE_COMPLETE) != NOTIFY_DONE)
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return;
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debug_fence_set_state(fence, DEBUG_FENCE_NOTIFY, DEBUG_FENCE_IDLE);
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__i915_sw_fence_wake_up_all(fence, continuation);
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debug_fence_destroy(fence);
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__i915_sw_fence_notify(fence, FENCE_FREE);
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}
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static void i915_sw_fence_complete(struct i915_sw_fence *fence)
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{
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debug_fence_assert(fence);
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if (WARN_ON(i915_sw_fence_done(fence)))
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return;
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__i915_sw_fence_complete(fence, NULL);
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}
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static void i915_sw_fence_await(struct i915_sw_fence *fence)
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{
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debug_fence_assert(fence);
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WARN_ON(atomic_inc_return(&fence->pending) <= 1);
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}
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void __i915_sw_fence_init(struct i915_sw_fence *fence,
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i915_sw_fence_notify_t fn,
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const char *name,
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struct lock_class_key *key)
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{
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BUG_ON(!fn || (unsigned long)fn & ~I915_SW_FENCE_MASK);
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debug_fence_init(fence);
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__init_waitqueue_head(&fence->wait, name, key);
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atomic_set(&fence->pending, 1);
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fence->flags = (unsigned long)fn;
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}
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void i915_sw_fence_commit(struct i915_sw_fence *fence)
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{
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debug_fence_activate(fence);
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i915_sw_fence_complete(fence);
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}
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static int i915_sw_fence_wake(wait_queue_entry_t *wq, unsigned mode, int flags, void *key)
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{
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list_del(&wq->entry);
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__i915_sw_fence_complete(wq->private, key);
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if (wq->flags & I915_SW_FENCE_FLAG_ALLOC)
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kfree(wq);
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return 0;
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}
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static bool __i915_sw_fence_check_if_after(struct i915_sw_fence *fence,
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const struct i915_sw_fence * const signaler)
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{
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wait_queue_entry_t *wq;
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if (__test_and_set_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))
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return false;
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if (fence == signaler)
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return true;
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list_for_each_entry(wq, &fence->wait.head, entry) {
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if (wq->func != i915_sw_fence_wake)
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continue;
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if (__i915_sw_fence_check_if_after(wq->private, signaler))
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return true;
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}
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return false;
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}
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static void __i915_sw_fence_clear_checked_bit(struct i915_sw_fence *fence)
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{
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wait_queue_entry_t *wq;
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if (!__test_and_clear_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))
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return;
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list_for_each_entry(wq, &fence->wait.head, entry) {
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if (wq->func != i915_sw_fence_wake)
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continue;
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__i915_sw_fence_clear_checked_bit(wq->private);
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}
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}
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static bool i915_sw_fence_check_if_after(struct i915_sw_fence *fence,
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const struct i915_sw_fence * const signaler)
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{
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unsigned long flags;
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bool err;
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if (!IS_ENABLED(CONFIG_DRM_I915_SW_FENCE_CHECK_DAG))
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return false;
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spin_lock_irqsave(&i915_sw_fence_lock, flags);
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err = __i915_sw_fence_check_if_after(fence, signaler);
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__i915_sw_fence_clear_checked_bit(fence);
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spin_unlock_irqrestore(&i915_sw_fence_lock, flags);
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return err;
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}
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static int __i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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wait_queue_entry_t *wq, gfp_t gfp)
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{
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unsigned long flags;
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int pending;
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debug_fence_assert(fence);
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if (i915_sw_fence_done(signaler))
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return 0;
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debug_fence_assert(signaler);
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/* The dependency graph must be acyclic. */
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if (unlikely(i915_sw_fence_check_if_after(fence, signaler)))
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return -EINVAL;
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pending = 0;
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if (!wq) {
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wq = kmalloc(sizeof(*wq), gfp);
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if (!wq) {
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if (!gfpflags_allow_blocking(gfp))
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return -ENOMEM;
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i915_sw_fence_wait(signaler);
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return 0;
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}
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pending |= I915_SW_FENCE_FLAG_ALLOC;
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}
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INIT_LIST_HEAD(&wq->entry);
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wq->flags = pending;
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wq->func = i915_sw_fence_wake;
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wq->private = fence;
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i915_sw_fence_await(fence);
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spin_lock_irqsave(&signaler->wait.lock, flags);
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if (likely(!i915_sw_fence_done(signaler))) {
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__add_wait_queue_entry_tail(&signaler->wait, wq);
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pending = 1;
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} else {
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i915_sw_fence_wake(wq, 0, 0, NULL);
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pending = 0;
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}
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spin_unlock_irqrestore(&signaler->wait.lock, flags);
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return pending;
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}
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int i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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wait_queue_entry_t *wq)
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{
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return __i915_sw_fence_await_sw_fence(fence, signaler, wq, 0);
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}
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int i915_sw_fence_await_sw_fence_gfp(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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gfp_t gfp)
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{
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return __i915_sw_fence_await_sw_fence(fence, signaler, NULL, gfp);
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}
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struct i915_sw_dma_fence_cb {
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struct dma_fence_cb base;
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struct i915_sw_fence *fence;
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struct dma_fence *dma;
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struct timer_list timer;
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};
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static void timer_i915_sw_fence_wake(unsigned long data)
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{
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struct i915_sw_dma_fence_cb *cb = (struct i915_sw_dma_fence_cb *)data;
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pr_warn("asynchronous wait on fence %s:%s:%x timed out\n",
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cb->dma->ops->get_driver_name(cb->dma),
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cb->dma->ops->get_timeline_name(cb->dma),
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cb->dma->seqno);
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dma_fence_put(cb->dma);
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cb->dma = NULL;
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i915_sw_fence_complete(cb->fence);
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cb->timer.function = NULL;
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}
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static void dma_i915_sw_fence_wake(struct dma_fence *dma,
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struct dma_fence_cb *data)
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{
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struct i915_sw_dma_fence_cb *cb = container_of(data, typeof(*cb), base);
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del_timer_sync(&cb->timer);
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if (cb->timer.function)
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i915_sw_fence_complete(cb->fence);
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dma_fence_put(cb->dma);
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kfree(cb);
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}
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int i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,
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struct dma_fence *dma,
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unsigned long timeout,
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gfp_t gfp)
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{
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struct i915_sw_dma_fence_cb *cb;
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int ret;
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debug_fence_assert(fence);
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if (dma_fence_is_signaled(dma))
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return 0;
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cb = kmalloc(sizeof(*cb), gfp);
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if (!cb) {
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if (!gfpflags_allow_blocking(gfp))
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return -ENOMEM;
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return dma_fence_wait(dma, false);
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}
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cb->fence = fence;
|
|
i915_sw_fence_await(fence);
|
|
|
|
cb->dma = NULL;
|
|
__setup_timer(&cb->timer,
|
|
timer_i915_sw_fence_wake, (unsigned long)cb,
|
|
TIMER_IRQSAFE);
|
|
if (timeout) {
|
|
cb->dma = dma_fence_get(dma);
|
|
mod_timer(&cb->timer, round_jiffies_up(jiffies + timeout));
|
|
}
|
|
|
|
ret = dma_fence_add_callback(dma, &cb->base, dma_i915_sw_fence_wake);
|
|
if (ret == 0) {
|
|
ret = 1;
|
|
} else {
|
|
dma_i915_sw_fence_wake(dma, &cb->base);
|
|
if (ret == -ENOENT) /* fence already signaled */
|
|
ret = 0;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,
|
|
struct reservation_object *resv,
|
|
const struct dma_fence_ops *exclude,
|
|
bool write,
|
|
unsigned long timeout,
|
|
gfp_t gfp)
|
|
{
|
|
struct dma_fence *excl;
|
|
int ret = 0, pending;
|
|
|
|
debug_fence_assert(fence);
|
|
|
|
if (write) {
|
|
struct dma_fence **shared;
|
|
unsigned int count, i;
|
|
|
|
ret = reservation_object_get_fences_rcu(resv,
|
|
&excl, &count, &shared);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
if (shared[i]->ops == exclude)
|
|
continue;
|
|
|
|
pending = i915_sw_fence_await_dma_fence(fence,
|
|
shared[i],
|
|
timeout,
|
|
gfp);
|
|
if (pending < 0) {
|
|
ret = pending;
|
|
break;
|
|
}
|
|
|
|
ret |= pending;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
dma_fence_put(shared[i]);
|
|
kfree(shared);
|
|
} else {
|
|
excl = reservation_object_get_excl_rcu(resv);
|
|
}
|
|
|
|
if (ret >= 0 && excl && excl->ops != exclude) {
|
|
pending = i915_sw_fence_await_dma_fence(fence,
|
|
excl,
|
|
timeout,
|
|
gfp);
|
|
if (pending < 0)
|
|
ret = pending;
|
|
else
|
|
ret |= pending;
|
|
}
|
|
|
|
dma_fence_put(excl);
|
|
|
|
return ret;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftests/i915_sw_fence.c"
|
|
#endif
|