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5aa90a8458
Pull x86 page table isolation updates from Thomas Gleixner:
"This is the final set of enabling page table isolation on x86:
- Infrastructure patches for handling the extra page tables.
- Patches which map the various bits and pieces which are required to
get in and out of user space into the user space visible page
tables.
- The required changes to have CR3 switching in the entry/exit code.
- Optimizations for the CR3 switching along with documentation how
the ASID/PCID mechanism works.
- Updates to dump pagetables to cover the user space page tables for
W+X scans and extra debugfs files to analyze both the kernel and
the user space visible page tables
The whole functionality is compile time controlled via a config switch
and can be turned on/off on the command line as well"
* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (32 commits)
x86/ldt: Make the LDT mapping RO
x86/mm/dump_pagetables: Allow dumping current pagetables
x86/mm/dump_pagetables: Check user space page table for WX pages
x86/mm/dump_pagetables: Add page table directory to the debugfs VFS hierarchy
x86/mm/pti: Add Kconfig
x86/dumpstack: Indicate in Oops whether PTI is configured and enabled
x86/mm: Clarify the whole ASID/kernel PCID/user PCID naming
x86/mm: Use INVPCID for __native_flush_tlb_single()
x86/mm: Optimize RESTORE_CR3
x86/mm: Use/Fix PCID to optimize user/kernel switches
x86/mm: Abstract switching CR3
x86/mm: Allow flushing for future ASID switches
x86/pti: Map the vsyscall page if needed
x86/pti: Put the LDT in its own PGD if PTI is on
x86/mm/64: Make a full PGD-entry size hole in the memory map
x86/events/intel/ds: Map debug buffers in cpu_entry_area
x86/cpu_entry_area: Add debugstore entries to cpu_entry_area
x86/mm/pti: Map ESPFIX into user space
x86/mm/pti: Share entry text PMD
x86/entry: Align entry text section to PMD boundary
...
51 lines
1.5 KiB
Makefile
51 lines
1.5 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# Kernel does not boot with instrumentation of tlb.c and mem_encrypt.c
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KCOV_INSTRUMENT_tlb.o := n
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KCOV_INSTRUMENT_mem_encrypt.o := n
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KASAN_SANITIZE_mem_encrypt.o := n
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ifdef CONFIG_FUNCTION_TRACER
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CFLAGS_REMOVE_mem_encrypt.o = -pg
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endif
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obj-y := init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
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pat.o pgtable.o physaddr.o setup_nx.o tlb.o cpu_entry_area.o
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# Make sure __phys_addr has no stackprotector
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nostackp := $(call cc-option, -fno-stack-protector)
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CFLAGS_physaddr.o := $(nostackp)
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CFLAGS_setup_nx.o := $(nostackp)
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CFLAGS_fault.o := -I$(src)/../include/asm/trace
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obj-$(CONFIG_X86_PAT) += pat_rbtree.o
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obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_X86_PTDUMP_CORE) += dump_pagetables.o
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obj-$(CONFIG_X86_PTDUMP) += debug_pagetables.o
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obj-$(CONFIG_HIGHMEM) += highmem_32.o
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KASAN_SANITIZE_kasan_init_$(BITS).o := n
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obj-$(CONFIG_KASAN) += kasan_init_$(BITS).o
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obj-$(CONFIG_MMIOTRACE) += mmiotrace.o
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mmiotrace-y := kmmio.o pf_in.o mmio-mod.o
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obj-$(CONFIG_MMIOTRACE_TEST) += testmmiotrace.o
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obj-$(CONFIG_NUMA) += numa.o numa_$(BITS).o
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obj-$(CONFIG_AMD_NUMA) += amdtopology.o
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obj-$(CONFIG_ACPI_NUMA) += srat.o
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obj-$(CONFIG_NUMA_EMU) += numa_emulation.o
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obj-$(CONFIG_X86_INTEL_MPX) += mpx.o
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obj-$(CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS) += pkeys.o
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obj-$(CONFIG_RANDOMIZE_MEMORY) += kaslr.o
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obj-$(CONFIG_PAGE_TABLE_ISOLATION) += pti.o
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obj-$(CONFIG_AMD_MEM_ENCRYPT) += mem_encrypt.o
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obj-$(CONFIG_AMD_MEM_ENCRYPT) += mem_encrypt_boot.o
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