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3d635aba0b
Use bcl 20,31,0f rather than plain bl to avoid unbalancing the link stack. Update the code to use REL16 relocs, available for ppc64 in 2009 (and ppc32 in 2005). Signed-off-by: Alan Modra <amodra@gmail.com> [mpe: Incorporate more detail into the change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
68 lines
1.6 KiB
ArmAsm
68 lines
1.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copied from <file:arch/powerpc/kernel/misc_32.S>
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*
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* This file contains miscellaneous low-level functions.
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras.
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*
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* kexec bits:
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* Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
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* GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
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*/
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#include "ppc_asm.h"
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#define SPRN_PVR 0x11F /* Processor Version Register */
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.text
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/* udelay needs to know the period of the
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* timebase in nanoseconds. This used to be hardcoded to be 60ns
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* (period of 66MHz/4). Now a variable is used that is initialized to
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* 60 for backward compatibility, but it can be overridden as necessary
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* with code something like this:
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* extern unsigned long timebase_period_ns;
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* timebase_period_ns = 1000000000 / bd->bi_tbfreq;
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*/
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.data
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.globl timebase_period_ns
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timebase_period_ns:
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.long 60
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.text
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/*
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* Delay for a number of microseconds
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*/
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.globl udelay
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udelay:
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mulli r4,r3,1000 /* nanoseconds */
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/* Change r4 to be the number of ticks using:
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* (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
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* timebase_period_ns defaults to 60 (16.6MHz) */
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mflr r5
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bcl 20,31,0f
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0: mflr r6
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mtlr r5
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addis r5,r6,(timebase_period_ns-0b)@ha
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lwz r5,(timebase_period_ns-0b)@l(r5)
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add r4,r4,r5
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addi r4,r4,-1
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divw r4,r4,r5 /* BUS ticks */
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1: MFTBU(r5)
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MFTBL(r6)
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MFTBU(r7)
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cmpw 0,r5,r7
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bne 1b /* Get [synced] base time */
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addc r9,r6,r4 /* Compute end time */
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addze r8,r5
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2: MFTBU(r5)
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cmpw 0,r5,r8
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blt 2b
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bgt 3f
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MFTBL(r6)
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cmpw 0,r6,r9
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blt 2b
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3: blr
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