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e769ece3b1
Fix the test within handle_pfmf() if the host has the NQ key-setting facility installed. Right now the code would incorrectly generate a program check in the guest if the NQ control bit for a pfmf request was set and if the host has the NQ key-setting facility installed. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
773 lines
21 KiB
C
773 lines
21 KiB
C
/*
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* handling privileged instructions
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*
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* Copyright IBM Corp. 2008, 2013
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*
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* Author(s): Carsten Otte <cotte@de.ibm.com>
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* Christian Borntraeger <borntraeger@de.ibm.com>
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*/
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#include <linux/kvm.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
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#include <linux/compat.h>
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#include <asm/asm-offsets.h>
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#include <asm/facility.h>
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#include <asm/current.h>
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#include <asm/debug.h>
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#include <asm/ebcdic.h>
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#include <asm/sysinfo.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
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#include <asm/compat.h>
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#include "gaccess.h"
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#include "kvm-s390.h"
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#include "trace.h"
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static int handle_set_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address = 0;
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u8 tmp;
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vcpu->stat.instruction_spx++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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/* get the value */
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if (get_guest(vcpu, address, (u32 __user *) operand2))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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address = address & 0x7fffe000u;
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/* make sure that the new value is valid memory */
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if (copy_from_guest_absolute(vcpu, &tmp, address, 1) ||
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(copy_from_guest_absolute(vcpu, &tmp, address + PAGE_SIZE, 1)))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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kvm_s390_set_prefix(vcpu, address);
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VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 1, address);
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return 0;
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}
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static int handle_store_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address;
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vcpu->stat.instruction_stpx++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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address = vcpu->arch.sie_block->prefix;
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address = address & 0x7fffe000u;
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/* get the value */
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if (put_guest(vcpu, address, (u32 __user *)operand2))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 0, address);
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return 0;
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}
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static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
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{
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u64 useraddr;
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vcpu->stat.instruction_stap++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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useraddr = kvm_s390_get_base_disp_s(vcpu);
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if (useraddr & 1)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (put_guest(vcpu, vcpu->vcpu_id, (u16 __user *)useraddr))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", useraddr);
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trace_kvm_s390_handle_stap(vcpu, useraddr);
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return 0;
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}
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static int handle_skey(struct kvm_vcpu *vcpu)
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{
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vcpu->stat.instruction_storage_key++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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vcpu->arch.sie_block->gpsw.addr =
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__rewind_psw(vcpu->arch.sie_block->gpsw, 4);
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VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
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return 0;
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}
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static int handle_tpi(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_interrupt_info *inti;
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u64 addr;
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int cc;
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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cc = 0;
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inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->run->s.regs.crs[6], 0);
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if (!inti)
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goto no_interrupt;
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cc = 1;
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if (addr) {
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/*
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* Store the two-word I/O interruption code into the
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* provided area.
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*/
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if (put_guest(vcpu, inti->io.subchannel_id, (u16 __user *)addr)
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|| put_guest(vcpu, inti->io.subchannel_nr, (u16 __user *)(addr + 2))
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|| put_guest(vcpu, inti->io.io_int_parm, (u32 __user *)(addr + 4)))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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} else {
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/*
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* Store the three-word I/O interruption code into
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* the appropriate lowcore area.
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*/
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put_guest(vcpu, inti->io.subchannel_id, (u16 __user *) __LC_SUBCHANNEL_ID);
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put_guest(vcpu, inti->io.subchannel_nr, (u16 __user *) __LC_SUBCHANNEL_NR);
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put_guest(vcpu, inti->io.io_int_parm, (u32 __user *) __LC_IO_INT_PARM);
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put_guest(vcpu, inti->io.io_int_word, (u32 __user *) __LC_IO_INT_WORD);
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}
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kfree(inti);
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no_interrupt:
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/* Set condition code and we're done. */
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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vcpu->arch.sie_block->gpsw.mask |= (cc & 3ul) << 44;
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return 0;
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}
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static int handle_tsch(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_interrupt_info *inti;
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inti = kvm_s390_get_io_int(vcpu->kvm, 0,
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vcpu->run->s.regs.gprs[1]);
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/*
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* Prepare exit to userspace.
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* We indicate whether we dequeued a pending I/O interrupt
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* so that userspace can re-inject it if the instruction gets
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* a program check. While this may re-order the pending I/O
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* interrupts, this is no problem since the priority is kept
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* intact.
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*/
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vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
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vcpu->run->s390_tsch.dequeued = !!inti;
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if (inti) {
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vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
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vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
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vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
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vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
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}
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vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
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kfree(inti);
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return -EREMOTE;
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}
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static int handle_io_inst(struct kvm_vcpu *vcpu)
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{
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VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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if (vcpu->kvm->arch.css_support) {
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/*
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* Most I/O instructions will be handled by userspace.
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* Exceptions are tpi and the interrupt portion of tsch.
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*/
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if (vcpu->arch.sie_block->ipa == 0xb236)
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return handle_tpi(vcpu);
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if (vcpu->arch.sie_block->ipa == 0xb235)
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return handle_tsch(vcpu);
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/* Handle in userspace. */
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return -EOPNOTSUPP;
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} else {
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/*
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* Set condition code 3 to stop the guest from issueing channel
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* I/O instructions.
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*/
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
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vcpu->arch.sie_block->gpsw.mask |= (3 & 3ul) << 44;
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return 0;
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}
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}
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static int handle_stfl(struct kvm_vcpu *vcpu)
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{
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unsigned int facility_list;
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int rc;
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vcpu->stat.instruction_stfl++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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/* only pass the facility bits, which we can handle */
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facility_list = S390_lowcore.stfl_fac_list & 0xff82fff3;
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rc = copy_to_guest(vcpu, offsetof(struct _lowcore, stfl_fac_list),
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&facility_list, sizeof(facility_list));
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if (rc)
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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VCPU_EVENT(vcpu, 5, "store facility list value %x", facility_list);
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trace_kvm_s390_handle_stfl(vcpu, facility_list);
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return 0;
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}
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static void handle_new_psw(struct kvm_vcpu *vcpu)
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{
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/* Check whether the new psw is enabled for machine checks. */
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_MCHECK)
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kvm_s390_deliver_pending_machine_checks(vcpu);
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}
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#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
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#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
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#define PSW_ADDR_24 0x0000000000ffffffUL
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#define PSW_ADDR_31 0x000000007fffffffUL
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static int is_valid_psw(psw_t *psw) {
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if (psw->mask & PSW_MASK_UNASSIGNED)
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return 0;
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if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
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if (psw->addr & ~PSW_ADDR_31)
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return 0;
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}
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if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
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return 0;
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if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
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return 0;
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return 1;
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}
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int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
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{
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psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
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psw_compat_t new_psw;
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u64 addr;
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if (gpsw->mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (copy_from_guest(vcpu, &new_psw, addr, sizeof(new_psw)))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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if (!(new_psw.mask & PSW32_MASK_BASE))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
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gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
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gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
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if (!is_valid_psw(gpsw))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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handle_new_psw(vcpu);
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return 0;
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}
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static int handle_lpswe(struct kvm_vcpu *vcpu)
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{
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psw_t new_psw;
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u64 addr;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (copy_from_guest(vcpu, &new_psw, addr, sizeof(new_psw)))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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vcpu->arch.sie_block->gpsw = new_psw;
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if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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handle_new_psw(vcpu);
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return 0;
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}
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static int handle_stidp(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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vcpu->stat.instruction_stidp++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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if (operand2 & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (put_guest(vcpu, vcpu->arch.stidp_data, (u64 __user *)operand2))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
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return 0;
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}
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static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
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{
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struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
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int cpus = 0;
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int n;
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spin_lock(&fi->lock);
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for (n = 0; n < KVM_MAX_VCPUS; n++)
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if (fi->local_int[n])
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cpus++;
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spin_unlock(&fi->lock);
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/* deal with other level 3 hypervisors */
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if (stsi(mem, 3, 2, 2))
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mem->count = 0;
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if (mem->count < 8)
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mem->count++;
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for (n = mem->count - 1; n > 0 ; n--)
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memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
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mem->vm[0].cpus_total = cpus;
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mem->vm[0].cpus_configured = cpus;
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mem->vm[0].cpus_standby = 0;
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mem->vm[0].cpus_reserved = 0;
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mem->vm[0].caf = 1000;
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memcpy(mem->vm[0].name, "KVMguest", 8);
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ASCEBC(mem->vm[0].name, 8);
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memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
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ASCEBC(mem->vm[0].cpi, 16);
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}
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static int handle_stsi(struct kvm_vcpu *vcpu)
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{
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int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
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int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
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int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
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unsigned long mem = 0;
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u64 operand2;
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int rc = 0;
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vcpu->stat.instruction_stsi++;
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VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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if (fc > 3) {
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vcpu->arch.sie_block->gpsw.mask |= 3ul << 44; /* cc 3 */
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return 0;
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}
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if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
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|| vcpu->run->s.regs.gprs[1] & 0xffff0000)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (fc == 0) {
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vcpu->run->s.regs.gprs[0] = 3 << 28;
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vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44); /* cc 0 */
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return 0;
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}
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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if (operand2 & 0xfff)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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switch (fc) {
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case 1: /* same handling for 1 and 2 */
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case 2:
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mem = get_zeroed_page(GFP_KERNEL);
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if (!mem)
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goto out_no_data;
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if (stsi((void *) mem, fc, sel1, sel2))
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goto out_no_data;
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break;
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case 3:
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if (sel1 != 2 || sel2 != 2)
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goto out_no_data;
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mem = get_zeroed_page(GFP_KERNEL);
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if (!mem)
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goto out_no_data;
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handle_stsi_3_2_2(vcpu, (void *) mem);
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break;
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}
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if (copy_to_guest_absolute(vcpu, operand2, (void *) mem, PAGE_SIZE)) {
|
|
rc = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
goto out_exception;
|
|
}
|
|
trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
|
|
free_page(mem);
|
|
vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
|
|
vcpu->run->s.regs.gprs[0] = 0;
|
|
return 0;
|
|
out_no_data:
|
|
/* condition code 3 */
|
|
vcpu->arch.sie_block->gpsw.mask |= 3ul << 44;
|
|
out_exception:
|
|
free_page(mem);
|
|
return rc;
|
|
}
|
|
|
|
static const intercept_handler_t b2_handlers[256] = {
|
|
[0x02] = handle_stidp,
|
|
[0x10] = handle_set_prefix,
|
|
[0x11] = handle_store_prefix,
|
|
[0x12] = handle_store_cpu_address,
|
|
[0x29] = handle_skey,
|
|
[0x2a] = handle_skey,
|
|
[0x2b] = handle_skey,
|
|
[0x30] = handle_io_inst,
|
|
[0x31] = handle_io_inst,
|
|
[0x32] = handle_io_inst,
|
|
[0x33] = handle_io_inst,
|
|
[0x34] = handle_io_inst,
|
|
[0x35] = handle_io_inst,
|
|
[0x36] = handle_io_inst,
|
|
[0x37] = handle_io_inst,
|
|
[0x38] = handle_io_inst,
|
|
[0x39] = handle_io_inst,
|
|
[0x3a] = handle_io_inst,
|
|
[0x3b] = handle_io_inst,
|
|
[0x3c] = handle_io_inst,
|
|
[0x5f] = handle_io_inst,
|
|
[0x74] = handle_io_inst,
|
|
[0x76] = handle_io_inst,
|
|
[0x7d] = handle_stsi,
|
|
[0xb1] = handle_stfl,
|
|
[0xb2] = handle_lpswe,
|
|
};
|
|
|
|
int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/*
|
|
* A lot of B2 instructions are priviledged. Here we check for
|
|
* the privileged ones, that we can handle in the kernel.
|
|
* Anything else goes to userspace.
|
|
*/
|
|
handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_epsw(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1, reg2;
|
|
|
|
kvm_s390_get_regs_rre(vcpu, ®1, ®2);
|
|
|
|
/* This basically extracts the mask half of the psw. */
|
|
vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000;
|
|
vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
|
|
if (reg2) {
|
|
vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000;
|
|
vcpu->run->s.regs.gprs[reg2] |=
|
|
vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffff;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#define PFMF_RESERVED 0xfffc0101UL
|
|
#define PFMF_SK 0x00020000UL
|
|
#define PFMF_CF 0x00010000UL
|
|
#define PFMF_UI 0x00008000UL
|
|
#define PFMF_FSC 0x00007000UL
|
|
#define PFMF_NQ 0x00000800UL
|
|
#define PFMF_MR 0x00000400UL
|
|
#define PFMF_MC 0x00000200UL
|
|
#define PFMF_KEY 0x000000feUL
|
|
|
|
static int handle_pfmf(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1, reg2;
|
|
unsigned long start, end;
|
|
|
|
vcpu->stat.instruction_pfmf++;
|
|
|
|
kvm_s390_get_regs_rre(vcpu, ®1, ®2);
|
|
|
|
if (!MACHINE_HAS_PFMF)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
/* Only provide non-quiescing support if the host supports it */
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
/* No support for conditional-SSKE */
|
|
if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
|
|
switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
|
|
case 0x00000000:
|
|
end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
|
|
break;
|
|
case 0x00001000:
|
|
end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
|
|
break;
|
|
/* We dont support EDAT2
|
|
case 0x00002000:
|
|
end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
|
|
break;*/
|
|
default:
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
}
|
|
while (start < end) {
|
|
unsigned long useraddr;
|
|
|
|
useraddr = gmap_translate(start, vcpu->arch.gmap);
|
|
if (IS_ERR((void *)useraddr))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
|
|
if (clear_user((void __user *)useraddr, PAGE_SIZE))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
|
|
if (set_guest_storage_key(current->mm, useraddr,
|
|
vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
|
|
vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
start += PAGE_SIZE;
|
|
}
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
|
|
vcpu->run->s.regs.gprs[reg2] = end;
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t b9_handlers[256] = {
|
|
[0x8d] = handle_epsw,
|
|
[0x9c] = handle_io_inst,
|
|
[0xaf] = handle_pfmf,
|
|
};
|
|
|
|
int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/* This is handled just as for the B2 instructions. */
|
|
handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
u64 useraddr;
|
|
u32 val = 0;
|
|
int reg, rc;
|
|
|
|
vcpu->stat.instruction_lctl++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
useraddr = kvm_s390_get_base_disp_rs(vcpu);
|
|
|
|
if (useraddr & 3)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x, addr:%llx", reg1, reg3,
|
|
useraddr);
|
|
trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, useraddr);
|
|
|
|
reg = reg1;
|
|
do {
|
|
rc = get_guest(vcpu, val, (u32 __user *) useraddr);
|
|
if (rc)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
|
|
vcpu->arch.sie_block->gcr[reg] |= val;
|
|
useraddr += 4;
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int handle_lctlg(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
u64 useraddr;
|
|
int reg, rc;
|
|
|
|
vcpu->stat.instruction_lctlg++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
useraddr = kvm_s390_get_base_disp_rsy(vcpu);
|
|
|
|
if (useraddr & 7)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
reg = reg1;
|
|
|
|
VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x, addr:%llx", reg1, reg3,
|
|
useraddr);
|
|
trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, useraddr);
|
|
|
|
do {
|
|
rc = get_guest(vcpu, vcpu->arch.sie_block->gcr[reg],
|
|
(u64 __user *) useraddr);
|
|
if (rc)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
useraddr += 8;
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t eb_handlers[256] = {
|
|
[0x2f] = handle_lctlg,
|
|
[0x8a] = handle_io_inst,
|
|
};
|
|
|
|
int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_tprot(struct kvm_vcpu *vcpu)
|
|
{
|
|
u64 address1, address2;
|
|
struct vm_area_struct *vma;
|
|
unsigned long user_address;
|
|
|
|
vcpu->stat.instruction_tprot++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
kvm_s390_get_base_disp_sse(vcpu, &address1, &address2);
|
|
|
|
/* we only handle the Linux memory detection case:
|
|
* access key == 0
|
|
* guest DAT == off
|
|
* everything else goes to userspace. */
|
|
if (address2 & 0xf0)
|
|
return -EOPNOTSUPP;
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
|
|
return -EOPNOTSUPP;
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
user_address = __gmap_translate(address1, vcpu->arch.gmap);
|
|
if (IS_ERR_VALUE(user_address))
|
|
goto out_inject;
|
|
vma = find_vma(current->mm, user_address);
|
|
if (!vma)
|
|
goto out_inject;
|
|
vcpu->arch.sie_block->gpsw.mask &= ~(3ul << 44);
|
|
if (!(vma->vm_flags & VM_WRITE) && (vma->vm_flags & VM_READ))
|
|
vcpu->arch.sie_block->gpsw.mask |= (1ul << 44);
|
|
if (!(vma->vm_flags & VM_WRITE) && !(vma->vm_flags & VM_READ))
|
|
vcpu->arch.sie_block->gpsw.mask |= (2ul << 44);
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
return 0;
|
|
|
|
out_inject:
|
|
up_read(¤t->mm->mmap_sem);
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
|
|
{
|
|
/* For e5xx... instructions we only handle TPROT */
|
|
if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
|
|
return handle_tprot(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_sckpf(struct kvm_vcpu *vcpu)
|
|
{
|
|
u32 value;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_SPECIFICATION);
|
|
|
|
value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
|
|
vcpu->arch.sie_block->todpr = value;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t x01_handlers[256] = {
|
|
[0x07] = handle_sckpf,
|
|
};
|
|
|
|
int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|