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6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
124 lines
3.2 KiB
C
124 lines
3.2 KiB
C
/*
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* linux/arch/arm/mach-omap2/id.c
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*
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* OMAP2 CPU identification code
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*
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* Copyright (C) 2005 Nokia Corporation
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#define OMAP24XX_TAP_BASE io_p2v(0x48014000)
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#define OMAP_TAP_IDCODE 0x0204
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#define OMAP_TAP_PROD_ID 0x0208
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#define OMAP_TAP_DIE_ID_0 0x0218
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#define OMAP_TAP_DIE_ID_1 0x021C
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#define OMAP_TAP_DIE_ID_2 0x0220
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#define OMAP_TAP_DIE_ID_3 0x0224
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/* system_rev fields for OMAP2 processors:
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* CPU id bits [31:16],
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* CPU device type [15:12], (unprg,normal,POP)
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* CPU revision [11:08]
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* CPU class bits [07:00]
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*/
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struct omap_id {
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u16 hawkeye; /* Silicon type (Hawkeye id) */
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u8 dev; /* Device type from production_id reg */
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u32 type; /* combined type id copied to system_rev */
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};
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/* Register values to detect the OMAP version */
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static struct omap_id omap_ids[] __initdata = {
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{ .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
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{ .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
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{ .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
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{ .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
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{ .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
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{ .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
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};
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static u32 __init read_tap_reg(int reg)
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{
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return __raw_readl(OMAP24XX_TAP_BASE + reg);
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}
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void __init omap2_check_revision(void)
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{
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int i, j;
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u32 idcode;
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u32 prod_id;
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u16 hawkeye;
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u8 dev_type;
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u8 rev;
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idcode = read_tap_reg(OMAP_TAP_IDCODE);
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prod_id = read_tap_reg(OMAP_TAP_PROD_ID);
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hawkeye = (idcode >> 12) & 0xffff;
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rev = (idcode >> 28) & 0x0f;
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dev_type = (prod_id >> 16) & 0x0f;
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#ifdef DEBUG
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printk(KERN_DEBUG "OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
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idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
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printk(KERN_DEBUG "OMAP_TAP_DIE_ID_0: 0x%08x\n",
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read_tap_reg(OMAP_TAP_DIE_ID_0));
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printk(KERN_DEBUG "OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
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read_tap_reg(OMAP_TAP_DIE_ID_1),
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(read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
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printk(KERN_DEBUG "OMAP_TAP_DIE_ID_2: 0x%08x\n",
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read_tap_reg(OMAP_TAP_DIE_ID_2));
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printk(KERN_DEBUG "OMAP_TAP_DIE_ID_3: 0x%08x\n",
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read_tap_reg(OMAP_TAP_DIE_ID_3));
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printk(KERN_DEBUG "OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
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prod_id, dev_type);
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#endif
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/* Check hawkeye ids */
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for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
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if (hawkeye == omap_ids[i].hawkeye)
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break;
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}
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if (i == ARRAY_SIZE(omap_ids)) {
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printk(KERN_ERR "Unknown OMAP CPU id\n");
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return;
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}
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for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
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if (dev_type == omap_ids[j].dev)
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break;
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}
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if (j == ARRAY_SIZE(omap_ids)) {
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printk(KERN_ERR "Unknown OMAP device type. "
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"Handling it as OMAP%04x\n",
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omap_ids[i].type >> 16);
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j = i;
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}
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system_rev = omap_ids[j].type;
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system_rev |= rev << 8;
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/* Add the cpu class info (24xx) */
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system_rev |= 0x24;
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pr_info("OMAP%04x", system_rev >> 16);
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if ((system_rev >> 8) & 0x0f)
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printk("%x", (system_rev >> 8) & 0x0f);
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printk("\n");
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}
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