Andre Przywara e4823a7a1b KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors ... Since the GIC CPU interface is always virtualized by the hardware, we don't have CPU interface state information readily available in our emulation if userland wants to save or restore it. Fortunately the GIC hypervisor interface provides the VMCR register to access the required virtual CPU interface bits. Provide wrappers for GICv2 and GICv3 hosts to have access to this register. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>		2016-05-20 15:40:04 +02:00
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hyp	KVM: arm/arm64: Get rid of vgic_cpu->nr_lr	2016-05-20 15:39:41 +02:00
vgic	KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors	2016-05-20 15:40:04 +02:00
arch_timer.c	KVM: arm/arm64: Move timer IRQ map to latest possible time	2016-05-20 15:39:41 +02:00
pmu.c	KVM: arm/arm64: pmu: abstract access to number of SPIs	2016-05-20 15:39:43 +02:00
trace.h	arm/arm64: KVM: Add tracepoints for vgic and timer	2015-10-22 23:01:48 +02:00
vgic-v2-emul.c	KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit	2016-03-09 04:24:03 +00:00
vgic-v2.c	KVM: arm/arm64: Get rid of vgic_cpu->nr_lr	2016-05-20 15:39:41 +02:00
vgic-v3-emul.c	KVM: arm: vgic: Drop useless Group0 warning	2015-06-17 09:58:12 +01:00
vgic-v3.c	KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h	2016-05-20 15:39:44 +02:00
vgic.c	KVM: arm/arm64: Fix MMIO emulation data handling	2016-05-20 15:39:42 +02:00
vgic.h	KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus	2015-03-30 17:07:19 +01:00