Chengguang Xu de9a7f6f5f fpga: dfl: expand minor range when registering chrdev region ... Actually, total amount of available minor number for a single major is MINORMASK + 1. So expand minor range when registering chrdev region. Signed-off-by: Chengguang Xu <cgxu519@gmx.com> Acked-by: Wu Hao <hao.wu@intel.com> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2019-05-24 20:32:12 +02:00
..
altera-cvp.c	fpga: altera-cvp: fix probing for multiple FPGAs on the bus	2018-11-26 20:12:05 +01:00
altera-fpga2sdram.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
altera-hps2fpga.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c	fpga: use SPDX	2018-05-25 18:23:56 +02:00
altera-pr-ip-core.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
altera-ps-spi.c	fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size	2019-01-31 16:22:51 +01:00
dfl-afu-dma-region.c	fpga: dfl: afu: Pass the correct device to dma_mapping_error()	2019-05-24 20:32:12 +02:00
dfl-afu-main.c	fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support	2018-07-15 13:55:47 +02:00
dfl-afu-region.c	fpga: dfl: afu: add afu sub feature support	2018-07-15 13:55:47 +02:00
dfl-afu.h	fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support	2018-07-15 13:55:47 +02:00
dfl-fme-br.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
dfl-fme-main.c	fpga: dfl: fme: add partial reconfiguration sub feature support	2018-07-15 13:55:46 +02:00
dfl-fme-mgr.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
dfl-fme-pr.c	Remove 'type' argument from access_ok() function	2019-01-03 18:57:57 -08:00
dfl-fme-pr.h	fpga: dfl: fme: add partial reconfiguration sub feature support	2018-07-15 13:55:46 +02:00
dfl-fme-region.c	fpga: dfl-fme-region: Use platform_get_drvdata()	2018-11-26 20:47:10 +01:00
dfl-fme.h	fpga: dfl: fme: add partial reconfiguration sub feature support	2018-07-15 13:55:46 +02:00
dfl-pci.c	fpga: dfl-pci: add enumeration for feature devices	2018-07-15 13:55:45 +02:00
dfl.c	fpga: dfl: expand minor range when registering chrdev region	2019-05-24 20:32:12 +02:00
dfl.h	fpga: dfl: add dfl_fpga_check_port_id function.	2018-07-15 13:55:45 +02:00
fpga-bridge.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
fpga-mgr.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
fpga-region.c	fpga: add devm_fpga_region_create	2018-10-16 11:13:50 +02:00
ice40-spi.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
Kconfig	fpga manager: Adding FPGA Manager support for Xilinx zynqmp	2019-04-15 10:23:18 +02:00
machxo2-spi.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
Makefile	fpga manager: Adding FPGA Manager support for Xilinx zynqmp	2019-04-15 10:23:18 +02:00
of-fpga-region.c	fpga: of-fpga-region: Use platform_set_drvdata	2018-11-26 20:47:10 +01:00
socfpga-a10.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
socfpga.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
stratix10-soc.c	fpga: stratix10-soc: fix use-after-free on s10_init()	2019-05-24 20:32:12 +02:00
ts73xx-fpga.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
xilinx-pr-decoupler.c	fpga: bridge: add devm_fpga_bridge_create	2018-10-16 11:13:50 +02:00
xilinx-spi.c	fpga: mgr: add devm_fpga_mgr_create	2018-10-16 11:13:50 +02:00
zynq-fpga.c	zynq-fpga: Only route PR via PCAP when required	2018-11-11 12:58:27 -08:00
zynqmp-fpga.c	fpga manager: Adding FPGA Manager support for Xilinx zynqmp	2019-04-15 10:23:18 +02:00