linux/arch/mn10300/mm
Akira Takeuchi dccbf4853a MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control
Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control as the bits
are a more suitable layout.

Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
2010-10-27 17:28:50 +01:00
..
cache-disabled.c MN10300: Handle missing sys_cacheflush() when caching disabled 2010-09-28 18:01:14 -07:00
cache-flush-by-reg.S MN10300: AM34: Add cacheflushing by using the AM34 purge registers 2010-10-27 17:28:45 +01:00
cache-flush-by-tag.S MN10300: SMP: Differentiate local cache flushing 2010-10-27 17:28:45 +01:00
cache-flush-icache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-inv-by-reg.S MN10300: AM34: Add cacheflushing by using the AM34 purge registers 2010-10-27 17:28:45 +01:00
cache-inv-by-tag.S MN10300: SMP: Differentiate local cache flushing 2010-10-27 17:28:45 +01:00
cache-inv-icache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp-flush.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp-inv.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp.h MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
dma-alloc.c arch/mn10300/mm: eliminate NULL dereference 2010-08-23 11:41:24 -07:00
extable.c mn10300: add the MN10300/AM33 architecture to the kernel 2008-02-08 09:22:30 -08:00
fault.c MN10300: Remove monitor/JTAG functions 2010-10-27 17:28:41 +01:00
init.c MN10300: Rename __flush_tlb*() to local_flush_tlb*() 2010-10-27 17:28:49 +01:00
Kconfig.cache MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
Makefile MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
misalignment.c MN10300: BUG to BUG_ON changes 2010-10-27 17:28:33 +01:00
mmu-context.c MN10300: Make the use of PIDR to mark TLB entries controllable 2010-10-27 17:28:49 +01:00
pgtable.c MN10300: Rename __flush_tlb*() to local_flush_tlb*() 2010-10-27 17:28:49 +01:00
tlb-mn10300.S MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control 2010-10-27 17:28:50 +01:00