Ley Foon Tan 4a89c3088f nios2: fix cache coherency issue when debug with gdb ... Remove the end address checking for flushda function. We need to flush each address line for flushda instruction, from start to end address. This is because flushda instruction only flush the cache if tag and line fields are matched. Change to use ldwio instruction (bypass cache) to load the instruction that causing trap. Our interest is the actual instruction that executed by the processor, this should be uncached. Note, EA address might be an userspace cached address. Signed-off-by: Ley Foon Tan <lftan@altera.com>		2015-04-10 11:10:08 +08:00
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boot	nios2: Add support for compressed kernel	2015-02-10 23:26:34 +08:00
configs	nios2: default CONFIG_NIOS2_BOOT_LINK_OFFSET to 8MB	2015-02-10 23:34:23 +08:00
include	nios2: add missing ptrace registers defines	2015-04-09 18:28:05 +08:00
kernel	nios2: fix cache coherency issue when debug with gdb	2015-04-10 11:10:08 +08:00
lib	nios2: Build infrastructure	2014-12-08 12:56:06 +08:00
mm	nios2: fix cache coherency issue when debug with gdb	2015-04-10 11:10:08 +08:00
platform	nios2: Build infrastructure	2014-12-08 12:56:06 +08:00
Kconfig	nios2: add kgdb support	2015-02-16 19:26:43 +08:00
Kconfig.debug	nios2: add early printk support	2015-02-10 23:21:08 +08:00
Makefile	nios2: enable "make defconfig"	2014-12-17 13:37:09 +08:00