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This function is used by the ext4 multi block allocator patches. Also add generic_find_next_le_bit Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: <linux-ext4@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
307 lines
7.3 KiB
C
307 lines
7.3 KiB
C
#ifndef _M68KNOMMU_BITOPS_H
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#define _M68KNOMMU_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*/
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#include <linux/compiler.h>
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#include <asm/byteorder.h> /* swab32 */
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#ifdef __KERNEL__
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ffz.h>
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static __inline__ void set_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bset %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __set_bit(nr, addr) set_bit(nr, addr)
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bclr %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __clear_bit(nr, addr) clear_bit(nr, addr)
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static __inline__ void change_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bchg %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __change_bit(nr, addr) change_bit(nr, addr)
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static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bset %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
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static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bclr %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
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static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bchg %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
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/*
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* This routine doesn't need to be atomic.
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*/
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static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
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{
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int * a = (int *) addr;
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int mask;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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return ((mask & *a) != 0);
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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__constant_test_bit((nr),(addr)) : \
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__test_bit((nr),(addr)))
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/lock.h>
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static __inline__ int ext2_set_bit(int nr, volatile void * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bset %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bclr %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define ext2_set_bit_atomic(lock, nr, addr) \
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({ \
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int ret; \
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spin_lock(lock); \
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ret = ext2_set_bit((nr), (addr)); \
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spin_unlock(lock); \
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ret; \
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})
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#define ext2_clear_bit_atomic(lock, nr, addr) \
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({ \
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int ret; \
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spin_lock(lock); \
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ret = ext2_clear_bit((nr), (addr)); \
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spin_unlock(lock); \
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ret; \
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})
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static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
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: "=d" (retval)
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: "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("btst %2,%1; sne %0"
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: "=d" (retval)
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: "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define ext2_find_first_zero_bit(addr, size) \
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ext2_find_next_zero_bit((addr), (size), 0)
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static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
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{
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unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if(offset) {
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/* We hold the little endian value in tmp, but then the
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* shift is illegal. So we could keep a big endian value
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* in tmp, like this:
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*
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* tmp = __swab32(*(p++));
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* tmp |= ~0UL >> (32-offset);
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*
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* but this would decrease preformance, so we change the
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* shift:
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*/
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tmp = *(p++);
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tmp |= __swab32(~0UL >> (32-offset));
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if(size < 32)
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goto found_first;
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if(~tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while(size & ~31UL) {
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if(~(tmp = *(p++)))
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if(!size)
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return result;
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tmp = *p;
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found_first:
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/* tmp is little endian, so we would have to swab the shift,
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* see above. But then we have to swab tmp below for ffz, so
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* we might as well do this here.
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*/
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return result + ffz(__swab32(tmp) | (~0UL << size));
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found_middle:
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return result + ffz(__swab32(tmp));
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}
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#define ext2_find_next_bit(addr, size, off) \
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generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
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#include <asm-generic/bitops/minix.h>
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#endif /* __KERNEL__ */
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#endif /* _M68KNOMMU_BITOPS_H */
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