Claudiu Beznea d8c7983f31 ARM: at91: ddr: add registers definitions for sama7g5's ddr ... Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-12-claudiu.beznea@microchip.com		2021-07-19 14:32:12 +02:00
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arc	include/: replace HTTP links with HTTPS ones	2020-08-12 10:57:59 -07:00
at91	ARM: at91: ddr: add registers definitions for sama7g5's ddr	2021-07-19 14:32:12 +02:00
bcm2835	firmware: raspberrypi: Introduce devm_rpi_firmware_get()	2021-03-22 17:59:51 +01:00
canaan	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
fsl	Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"	2021-04-06 15:40:48 -05:00
imx	ARM: imx: Initialize SoC ID on i.MX50	2021-05-13 15:42:21 +08:00
mediatek	IOMMU Updates for Linux v5.12	2021-02-22 10:31:29 -08:00
microchip	mbox: add polarfire soc system controller mailbox	2021-06-26 12:06:48 -05:00
mscc	net: mscc: ocelot: support PTP Sync one-step timestamping	2021-04-27 14:10:15 -07:00
qcom	soc: qcom: rpmh: Remove serialization of TCS commands	2021-01-07 10:59:46 -06:00
rockchip	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
sa1100	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
sifive	riscv: move sifive_l2_cache.h to include/soc	2020-01-12 10:12:44 -08:00
tegra	ARM: Drivers for 5.14	2021-07-10 09:46:20 -07:00