Ricardo Ribalda 701dc207bf i2c: piix4: Avoid race conditions with IMC ... On AMD's SB800 and upwards, the SMBus is shared with the Integrated Micro Controller (IMC). The platform provides a hardware semaphore to avoid race conditions among them. (Check page 288 of the SB800-Series Southbridges Register Reference Guide http://support.amd.com/TechDocs/45482.pdf) Without this patch, many access to the SMBus end with an invalid transaction or even with the bus stalled. Reported-by: Alexandre Desnoyers <alex@qtec.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>: Signed-off-by: Wolfram Sang <wsa@the-dreams.de>		2017-01-12 20:52:12 +01:00
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algos
busses	i2c: piix4: Avoid race conditions with IMC	2017-01-12 20:52:12 +01:00
muxes
i2c-boardinfo.c
i2c-core.c
i2c-core.h
i2c-dev.c
i2c-mux.c
i2c-slave-eeprom.c
i2c-smbus.c
i2c-stub.c
Kconfig
Makefile