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The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1 and 2400v1 SoCs.Checking that the Transmit FIFO Empty (TXFE) bit is 0, instead of checking that the BUSY bit is 1, works around the issue. To facilitate this substitution of flags and values, introduce vendor-specific inversion of Feature Register bits when UART AMBA Port (UAP) data is available. For the earlycon case, prior to UAP availability, implement alternative putc and early_write functions. Similar to what how ARMv8 ACPI PCI quirks are detected during MCFG parsing, check the OEM fields of the Serial Port Console Redirection (SPCR) ACPI table to determine if the current platform is known to be affected by the erratum. Signed-off-by: Christopher Covington <cov@codeaurora.org> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Timur Tabi <timur@codeaurora.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
133 lines
3.0 KiB
C
133 lines
3.0 KiB
C
/*
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* Copyright (c) 2012, Intel Corporation
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* Copyright (c) 2015, Red Hat, Inc.
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* Copyright (c) 2015, 2016 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#define pr_fmt(fmt) "ACPI: SPCR: " fmt
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#include <linux/acpi.h>
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#include <linux/console.h>
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#include <linux/kernel.h>
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#include <linux/serial_core.h>
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/*
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* Some Qualcomm Datacenter Technologies SoCs have a defective UART BUSY bit.
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* Detect them by examining the OEM fields in the SPCR header, similiar to PCI
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* quirk detection in pci_mcfg.c.
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*/
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static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
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{
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if (memcmp(h->oem_id, "QCOM ", ACPI_OEM_ID_SIZE))
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return false;
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if (!memcmp(h->oem_table_id, "QDF2432 ", ACPI_OEM_TABLE_ID_SIZE))
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return true;
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if (!memcmp(h->oem_table_id, "QDF2400 ", ACPI_OEM_TABLE_ID_SIZE) &&
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h->oem_revision == 0)
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return true;
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return false;
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}
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/**
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* parse_spcr() - parse ACPI SPCR table and add preferred console
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*
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* @earlycon: set up earlycon for the console specified by the table
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*
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* For the architectures with support for ACPI, CONFIG_ACPI_SPCR_TABLE may be
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* defined to parse ACPI SPCR table. As a result of the parsing preferred
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* console is registered and if @earlycon is true, earlycon is set up.
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*
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* When CONFIG_ACPI_SPCR_TABLE is defined, this function should be called
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* from arch inintialization code as soon as the DT/ACPI decision is made.
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*
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*/
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int __init parse_spcr(bool earlycon)
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{
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static char opts[64];
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struct acpi_table_spcr *table;
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acpi_status status;
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char *uart;
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char *iotype;
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int baud_rate;
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int err;
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if (acpi_disabled)
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return -ENODEV;
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status = acpi_get_table(ACPI_SIG_SPCR, 0,
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(struct acpi_table_header **)&table);
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if (ACPI_FAILURE(status))
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return -ENOENT;
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if (table->header.revision < 2) {
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err = -ENOENT;
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pr_err("wrong table version\n");
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goto done;
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}
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iotype = table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY ?
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"mmio" : "io";
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switch (table->interface_type) {
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case ACPI_DBG2_ARM_SBSA_32BIT:
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iotype = "mmio32";
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/* fall through */
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case ACPI_DBG2_ARM_PL011:
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case ACPI_DBG2_ARM_SBSA_GENERIC:
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case ACPI_DBG2_BCM2835:
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uart = "pl011";
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break;
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case ACPI_DBG2_16550_COMPATIBLE:
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case ACPI_DBG2_16550_SUBSET:
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uart = "uart";
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break;
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default:
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err = -ENOENT;
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goto done;
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}
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switch (table->baud_rate) {
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case 3:
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baud_rate = 9600;
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break;
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case 4:
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baud_rate = 19200;
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break;
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case 6:
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baud_rate = 57600;
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break;
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case 7:
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baud_rate = 115200;
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break;
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default:
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err = -ENOENT;
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goto done;
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}
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if (qdf2400_erratum_44_present(&table->header))
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uart = "qdf2400_e44";
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snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
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table->serial_port.address, baud_rate);
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pr_info("console: %s\n", opts);
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if (earlycon)
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setup_earlycon(opts);
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err = add_preferred_console(uart, 0, opts + strlen(uart) + 1);
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done:
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acpi_put_table((struct acpi_table_header *)table);
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return err;
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}
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