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MIPS Enhanced Virtual Addressing (EVA) allows the virtual memory segments to be rearranged such that the KSeg0/KSeg1 segments are accessible TLB mapped to user mode, which would trigger a TLB Miss exception (due to lack of TLB mappings) instead of an Address Error exception. Update the TLB Miss handling similar to Address Error handling for guest MMIO emulation. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org |
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.. | ||
00README.txt | ||
callback.c | ||
commpage.c | ||
commpage.h | ||
dyntrans.c | ||
emulate.c | ||
entry.c | ||
fpu.S | ||
interrupt.c | ||
interrupt.h | ||
Kconfig | ||
Makefile | ||
mips.c | ||
mmu.c | ||
msa.S | ||
stats.c | ||
tlb.c | ||
trace.h | ||
trap_emul.c |