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d455937ed1
Noteworthy changes this time: 1) 4k support for newer chips (ganging up hwpipes and mixers) 2) using OPP bindings for gpu 3) more prep work towards per-process pagetables * 'msm-next' of git://people.freedesktop.org/~robclark/linux: (47 commits) msm/drm: gpu: Dynamically locate the clocks from the device tree drm/msm: gpu: Use OPP tables if we can drm/msm: Hard code the GPU "slow frequency" drm/msm: Add MSM_PARAM_GMEM_BASE drm/msm: Reference count address spaces drm/msm: Make sure to detach the MMU during GPU cleanup drm/msm/mdp5: Enable 3D mux in mdp5_ctl drm/msm/mdp5: Reset CTL blend registers before configuring them drm/msm/mdp5: Assign 'right' mixer to CRTC state drm/msm/mdp5: Stage border out on base stage if CRTC has 2 LMs drm/msm/mdp5: Stage right side hwpipes on Right-side Layer Mixer drm/msm/mdp5: Prepare Layer Mixers for source split drm/msm/mdp5: Configure 'right' hwpipe drm/msm/mdp5: Assign a 'right hwpipe' to plane state drm/msm/mdp5: Create mdp5_hwpipe_mode_set drm/msm/mdp5: Add optional 'right' Layer Mixer in CRTC state drm/msm/mdp5: Add a CAP for Source Split drm/msm/mdp5: Remove mixer/intf pointers from mdp5_ctl drm/msm/mdp5: Start using parameters from CRTC state drm/msm/mdp5: Add more stuff to CRTC state ... |
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| .. | ||
| amdgpu_drm.h | ||
| armada_drm.h | ||
| drm_fourcc.h | ||
| drm_mode.h | ||
| drm_sarea.h | ||
| drm.h | ||
| etnaviv_drm.h | ||
| exynos_drm.h | ||
| i810_drm.h | ||
| i915_drm.h | ||
| Kbuild | ||
| mga_drm.h | ||
| msm_drm.h | ||
| nouveau_drm.h | ||
| omap_drm.h | ||
| qxl_drm.h | ||
| r128_drm.h | ||
| radeon_drm.h | ||
| savage_drm.h | ||
| sis_drm.h | ||
| tegra_drm.h | ||
| vc4_drm.h | ||
| vgem_drm.h | ||
| via_drm.h | ||
| virtgpu_drm.h | ||
| vmwgfx_drm.h | ||