mirror of
https://github.com/torvalds/linux.git
synced 2024-11-15 08:31:55 +00:00
26d34431ad
Add a clock driver for the cpu dynamic divider, this divider needs to have a flag set before setting the divider value then removed while writing the new value to the register. This drivers implements this behavior and will be used essentially on the Amlogic G12A and G12B SoCs for cpu clock trees. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
110 lines
2.7 KiB
Plaintext
110 lines
2.7 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
|
|
config COMMON_CLK_MESON_REGMAP
|
|
tristate
|
|
select REGMAP
|
|
|
|
config COMMON_CLK_MESON_DUALDIV
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_MPLL
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_PHASE
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_PLL
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_SCLK_DIV
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_VID_PLL_DIV
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_AO_CLKC
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select RESET_CONTROLLER
|
|
|
|
config COMMON_CLK_MESON_EE_CLKC
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON_CPU_DYNDIV
|
|
tristate
|
|
select COMMON_CLK_MESON_REGMAP
|
|
|
|
config COMMON_CLK_MESON8B
|
|
bool
|
|
depends on ARCH_MESON
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select COMMON_CLK_MESON_MPLL
|
|
select COMMON_CLK_MESON_PLL
|
|
select MFD_SYSCON
|
|
select RESET_CONTROLLER
|
|
help
|
|
Support for the clock controller on AmLogic S802 (Meson8),
|
|
S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you
|
|
want peripherals and CPU frequency scaling to work.
|
|
|
|
config COMMON_CLK_GXBB
|
|
bool
|
|
depends on ARCH_MESON
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select COMMON_CLK_MESON_DUALDIV
|
|
select COMMON_CLK_MESON_VID_PLL_DIV
|
|
select COMMON_CLK_MESON_MPLL
|
|
select COMMON_CLK_MESON_PLL
|
|
select COMMON_CLK_MESON_AO_CLKC
|
|
select COMMON_CLK_MESON_EE_CLKC
|
|
select MFD_SYSCON
|
|
help
|
|
Support for the clock controller on AmLogic S905 devices, aka gxbb.
|
|
Say Y if you want peripherals and CPU frequency scaling to work.
|
|
|
|
config COMMON_CLK_AXG
|
|
bool
|
|
depends on ARCH_MESON
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select COMMON_CLK_MESON_DUALDIV
|
|
select COMMON_CLK_MESON_MPLL
|
|
select COMMON_CLK_MESON_PLL
|
|
select COMMON_CLK_MESON_AO_CLKC
|
|
select COMMON_CLK_MESON_EE_CLKC
|
|
select MFD_SYSCON
|
|
help
|
|
Support for the clock controller on AmLogic A113D devices, aka axg.
|
|
Say Y if you want peripherals and CPU frequency scaling to work.
|
|
|
|
config COMMON_CLK_AXG_AUDIO
|
|
tristate "Meson AXG Audio Clock Controller Driver"
|
|
depends on ARCH_MESON
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select COMMON_CLK_MESON_PHASE
|
|
select COMMON_CLK_MESON_SCLK_DIV
|
|
select REGMAP_MMIO
|
|
help
|
|
Support for the audio clock controller on AmLogic A113D devices,
|
|
aka axg, Say Y if you want audio subsystem to work.
|
|
|
|
config COMMON_CLK_G12A
|
|
bool
|
|
depends on ARCH_MESON
|
|
select COMMON_CLK_MESON_REGMAP
|
|
select COMMON_CLK_MESON_DUALDIV
|
|
select COMMON_CLK_MESON_MPLL
|
|
select COMMON_CLK_MESON_PLL
|
|
select COMMON_CLK_MESON_AO_CLKC
|
|
select COMMON_CLK_MESON_EE_CLKC
|
|
select COMMON_CLK_MESON_CPU_DYNDIV
|
|
select MFD_SYSCON
|
|
help
|
|
Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
|
|
devices, aka g12a. Say Y if you want peripherals to work.
|