Evan Quan d112ea3cf0 drm/amd/powerplay: avoid DPM reenable process on Navi1x ASICs V2 ... Otherwise, without RLC reinitialization, the DPM reenablement will fail. That affects the custom pptable uploading. V2: setting/clearing uploading_custom_pp_table in smu_sys_set_pp_table() Reported-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Matt Coffin <mcoffin13@gmail.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-11-22 14:35:10 -05:00
..
drm	drm/amd/powerplay: avoid DPM reenable process on Navi1x ASICs V2	2019-11-22 14:35:10 -05:00
host1x	gpu: host1x: Unconditionally select IOMMU_IOVA	2019-11-01 10:49:17 +01:00
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga
Makefile