mirror of
https://github.com/torvalds/linux.git
synced 2024-11-17 17:41:44 +00:00
92105bb706
Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Clock updates by Tuukka Tikkanen, Juha Yrjola, Daniel Petrini and Tony Lindgren - DMA fixes by Imre Deak, Juha Yrjola and Daniel Petrini - Add support to dual-mode hardware timers by Lauri Leukkunen - GPIO support for 24xx by Paul Mundt - GPIO wake-up support by Tony Lindgren - Better GPIO interrupt handler to not lose interrupts by Ralph Walden and Ladislav Michl - Power Management updates by Tuukka Tikkanen - Make Power Management code use new SRAM functions by Tony Lindgren Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
59 lines
1.5 KiB
ArmAsm
59 lines
1.5 KiB
ArmAsm
/*
|
|
* linux/arch/arm/plat-omap/sram.S
|
|
*
|
|
* Functions that need to be run in internal SRAM
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <linux/config.h>
|
|
#include <linux/linkage.h>
|
|
#include <asm/assembler.h>
|
|
#include <asm/arch/io.h>
|
|
#include <asm/arch/hardware.h>
|
|
|
|
.text
|
|
|
|
/*
|
|
* Reprograms ULPD and CKCTL.
|
|
*/
|
|
ENTRY(sram_reprogram_clock)
|
|
stmfd sp!, {r0 - r12, lr} @ save registers on stack
|
|
|
|
mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000
|
|
orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000
|
|
orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00
|
|
|
|
mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000
|
|
orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
|
|
orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
|
|
|
|
tst r0, #1 << 4 @ want lock mode?
|
|
beq newck @ nope
|
|
bic r0, r0, #1 << 4 @ else clear lock bit
|
|
strh r0, [r2] @ set dpll into bypass mode
|
|
orr r0, r0, #1 << 4 @ set lock bit again
|
|
|
|
newck:
|
|
strh r1, [r3] @ write new ckctl value
|
|
strh r0, [r2] @ write new dpll value
|
|
|
|
mov r4, #0x0700 @ let the clocks settle
|
|
orr r4, r4, #0x00ff
|
|
delay: sub r4, r4, #1
|
|
cmp r4, #0
|
|
bne delay
|
|
|
|
lock: ldrh r4, [r2], #0 @ read back dpll value
|
|
tst r0, #1 << 4 @ want lock mode?
|
|
beq out @ nope
|
|
tst r4, #1 << 0 @ dpll rate locked?
|
|
beq lock @ try again
|
|
|
|
out:
|
|
ldmfd sp!, {r0 - r12, pc} @ restore regs and return
|
|
ENTRY(sram_reprogram_clock_sz)
|
|
.word . - sram_reprogram_clock
|