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77555ee722
Signed-off-by: Masayuki Ohtake <masa-korg@dsn.okisemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
246 lines
6.2 KiB
C
246 lines
6.2 KiB
C
/*
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* Copyright (C) 1999 - 2010 Intel Corporation.
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* Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
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*
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* This code was derived from the Intel e1000e Linux driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "pch_gbe.h"
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#include "pch_gbe_phy.h"
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/* bus type values */
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#define pch_gbe_bus_type_unknown 0
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#define pch_gbe_bus_type_pci 1
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#define pch_gbe_bus_type_pcix 2
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#define pch_gbe_bus_type_pci_express 3
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#define pch_gbe_bus_type_reserved 4
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/* bus speed values */
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#define pch_gbe_bus_speed_unknown 0
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#define pch_gbe_bus_speed_33 1
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#define pch_gbe_bus_speed_66 2
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#define pch_gbe_bus_speed_100 3
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#define pch_gbe_bus_speed_120 4
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#define pch_gbe_bus_speed_133 5
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#define pch_gbe_bus_speed_2500 6
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#define pch_gbe_bus_speed_reserved 7
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/* bus width values */
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#define pch_gbe_bus_width_unknown 0
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#define pch_gbe_bus_width_pcie_x1 1
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#define pch_gbe_bus_width_pcie_x2 2
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#define pch_gbe_bus_width_pcie_x4 4
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#define pch_gbe_bus_width_32 5
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#define pch_gbe_bus_width_64 6
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#define pch_gbe_bus_width_reserved 7
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/**
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* pch_gbe_plat_get_bus_info - Obtain bus information for adapter
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* @hw: Pointer to the HW structure
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*/
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static void pch_gbe_plat_get_bus_info(struct pch_gbe_hw *hw)
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{
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hw->bus.type = pch_gbe_bus_type_pci_express;
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hw->bus.speed = pch_gbe_bus_speed_2500;
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hw->bus.width = pch_gbe_bus_width_pcie_x1;
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}
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/**
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* pch_gbe_plat_init_hw - Initialize hardware
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* @hw: Pointer to the HW structure
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* Returns
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* 0: Successfully
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* Negative value: Failed-EBUSY
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*/
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static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
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{
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s32 ret_val;
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ret_val = pch_gbe_phy_get_id(hw);
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if (ret_val) {
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pr_err("pch_gbe_phy_get_id error\n");
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return ret_val;
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}
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pch_gbe_phy_init_setting(hw);
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/* Setup Mac interface option RGMII */
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#ifdef PCH_GBE_MAC_IFOP_RGMII
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pch_gbe_phy_set_rgmii(hw);
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#endif
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return ret_val;
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}
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static const struct pch_gbe_functions pch_gbe_ops = {
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.get_bus_info = pch_gbe_plat_get_bus_info,
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.init_hw = pch_gbe_plat_init_hw,
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.read_phy_reg = pch_gbe_phy_read_reg_miic,
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.write_phy_reg = pch_gbe_phy_write_reg_miic,
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.reset_phy = pch_gbe_phy_hw_reset,
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.sw_reset_phy = pch_gbe_phy_sw_reset,
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.power_up_phy = pch_gbe_phy_power_up,
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.power_down_phy = pch_gbe_phy_power_down,
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.read_mac_addr = pch_gbe_mac_read_mac_addr
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};
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/**
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* pch_gbe_plat_init_function_pointers - Init func ptrs
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* @hw: Pointer to the HW structure
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*/
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void pch_gbe_plat_init_function_pointers(struct pch_gbe_hw *hw)
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{
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/* Set PHY parameter */
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hw->phy.reset_delay_us = PCH_GBE_PHY_RESET_DELAY_US;
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/* Set function pointers */
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hw->func = &pch_gbe_ops;
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}
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/**
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* pch_gbe_hal_setup_init_funcs - Initializes function pointers
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* @hw: Pointer to the HW structure
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* Returns
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* 0: Successfully
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* ENOSYS: Function is not registered
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*/
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inline s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
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{
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if (!hw->reg) {
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pr_err("ERROR: Registers not mapped\n");
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return -ENOSYS;
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}
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pch_gbe_plat_init_function_pointers(hw);
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return 0;
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}
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/**
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* pch_gbe_hal_get_bus_info - Obtain bus information for adapter
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* @hw: Pointer to the HW structure
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*/
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inline void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
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{
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if (!hw->func->get_bus_info)
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pr_err("ERROR: configuration\n");
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else
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hw->func->get_bus_info(hw);
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}
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/**
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* pch_gbe_hal_init_hw - Initialize hardware
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* @hw: Pointer to the HW structure
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* Returns
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* 0: Successfully
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* ENOSYS: Function is not registered
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*/
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inline s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
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{
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if (!hw->func->init_hw) {
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pr_err("ERROR: configuration\n");
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return -ENOSYS;
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}
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return hw->func->init_hw(hw);
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}
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/**
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* pch_gbe_hal_read_phy_reg - Reads PHY register
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* @hw: Pointer to the HW structure
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* @offset: The register to read
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* @data: The buffer to store the 16-bit read.
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* Returns
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* 0: Successfully
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* Negative value: Failed
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*/
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inline s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
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u16 *data)
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{
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if (!hw->func->read_phy_reg)
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return 0;
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return hw->func->read_phy_reg(hw, offset, data);
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}
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/**
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* pch_gbe_hal_write_phy_reg - Writes PHY register
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* @hw: Pointer to the HW structure
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* @offset: The register to read
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* @data: The value to write.
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* Returns
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* 0: Successfully
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* Negative value: Failed
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*/
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inline s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
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u16 data)
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{
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if (!hw->func->write_phy_reg)
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return 0;
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return hw->func->write_phy_reg(hw, offset, data);
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}
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/**
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* pch_gbe_hal_phy_hw_reset - Hard PHY reset
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* @hw: Pointer to the HW structure
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*/
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inline void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
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{
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if (!hw->func->reset_phy)
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pr_err("ERROR: configuration\n");
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else
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hw->func->reset_phy(hw);
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}
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/**
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* pch_gbe_hal_phy_sw_reset - Soft PHY reset
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* @hw: Pointer to the HW structure
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*/
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inline void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
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{
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if (!hw->func->sw_reset_phy)
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pr_err("ERROR: configuration\n");
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else
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hw->func->sw_reset_phy(hw);
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}
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/**
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* pch_gbe_hal_read_mac_addr - Reads MAC address
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* @hw: Pointer to the HW structure
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* Returns
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* 0: Successfully
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* ENOSYS: Function is not registered
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*/
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inline s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
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{
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if (!hw->func->read_mac_addr) {
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pr_err("ERROR: configuration\n");
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return -ENOSYS;
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}
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return hw->func->read_mac_addr(hw);
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}
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/**
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* pch_gbe_hal_power_up_phy - Power up PHY
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* @hw: Pointer to the HW structure
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*/
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inline void pch_gbe_hal_power_up_phy(struct pch_gbe_hw *hw)
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{
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if (hw->func->power_up_phy)
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hw->func->power_up_phy(hw);
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}
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/**
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* pch_gbe_hal_power_down_phy - Power down PHY
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* @hw: Pointer to the HW structure
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*/
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inline void pch_gbe_hal_power_down_phy(struct pch_gbe_hw *hw)
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{
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if (hw->func->power_down_phy)
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hw->func->power_down_phy(hw);
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}
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