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This enables the use of per-task stack canary values if GCC has support for emitting the stack canary reference relative to the value of tp, which holds the task struct pointer in the riscv kernel. After compare arm64 and x86 implementations, seems arm64's is more flexible and readable. The key point is how gcc get the offset of stack_canary from gs/el0_sp. x86: Use a fix offset from gs, not flexible. struct fixed_percpu_data { /* * GCC hardcodes the stack canary as %gs:40. Since the * irq_stack is the object at %gs:0, we reserve the bottom * 48 bytes of the irq stack for the canary. */ char gs_base[40]; // :( unsigned long stack_canary; }; arm64: Use -mstack-protector-guard-offset & guard-reg gcc options: -mstack-protector-guard=sysreg -mstack-protector-guard-reg=sp_el0 -mstack-protector-guard-offset=xxx riscv: Use -mstack-protector-guard-offset & guard-reg gcc options: -mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=xxx GCC's implementation has been merged: commit c931e8d5a96463427040b0d11f9c4352ac22b2b0 Author: Cooper Qu <cooper.qu@linux.alibaba.com> Date: Mon Jul 13 16:15:08 2020 +0800 RISC-V: Add support for TLS stack protector canary access In the end, these codes are inserted by gcc before return: * 0xffffffe00020b396 <+120>: ld a5,1008(tp) # 0x3f0 * 0xffffffe00020b39a <+124>: xor a5,a5,a4 * 0xffffffe00020b39c <+126>: mv a0,s5 * 0xffffffe00020b39e <+128>: bnez a5,0xffffffe00020b61c <_do_fork+766> 0xffffffe00020b3a2 <+132>: ld ra,136(sp) 0xffffffe00020b3a4 <+134>: ld s0,128(sp) 0xffffffe00020b3a6 <+136>: ld s1,120(sp) 0xffffffe00020b3a8 <+138>: ld s2,112(sp) 0xffffffe00020b3aa <+140>: ld s3,104(sp) 0xffffffe00020b3ac <+142>: ld s4,96(sp) 0xffffffe00020b3ae <+144>: ld s5,88(sp) 0xffffffe00020b3b0 <+146>: ld s6,80(sp) 0xffffffe00020b3b2 <+148>: ld s7,72(sp) 0xffffffe00020b3b4 <+150>: addi sp,sp,144 0xffffffe00020b3b6 <+152>: ret ... * 0xffffffe00020b61c <+766>: auipc ra,0x7f8 * 0xffffffe00020b620 <+770>: jalr -1764(ra) # 0xffffffe000a02f38 <__stack_chk_fail> Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Cooper Qu <cooper.qu@linux.alibaba.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
119 lines
3.3 KiB
Makefile
119 lines
3.3 KiB
Makefile
# This file is included by the global makefile so that you can add your own
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# architecture-specific flags and dependencies. Remember to do have actions
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# for "archclean" and "archdep" for cleaning up and making dependencies for
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# this architecture
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#
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# This file is subject to the terms and conditions of the GNU General Public
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# License. See the file "COPYING" in the main directory of this archive
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# for more details.
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#
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OBJCOPYFLAGS := -O binary
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LDFLAGS_vmlinux :=
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ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
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LDFLAGS_vmlinux := --no-relax
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KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
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CC_FLAGS_FTRACE := -fpatchable-function-entry=8
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endif
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ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy)
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KBUILD_CFLAGS_MODULE += -mcmodel=medany
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endif
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export BITS
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ifeq ($(CONFIG_ARCH_RV64I),y)
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BITS := 64
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UTS_MACHINE := riscv64
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KBUILD_CFLAGS += -mabi=lp64
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KBUILD_AFLAGS += -mabi=lp64
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KBUILD_LDFLAGS += -melf64lriscv
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else
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BITS := 32
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UTS_MACHINE := riscv32
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KBUILD_CFLAGS += -mabi=ilp32
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KBUILD_AFLAGS += -mabi=ilp32
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KBUILD_LDFLAGS += -melf32lriscv
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endif
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# ISA string setting
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riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
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riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
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riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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KBUILD_AFLAGS += -march=$(riscv-march-y)
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KBUILD_CFLAGS += -mno-save-restore
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KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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KBUILD_CFLAGS += -mcmodel=medlow
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endif
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ifeq ($(CONFIG_CMODEL_MEDANY),y)
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KBUILD_CFLAGS += -mcmodel=medany
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endif
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ifeq ($(CONFIG_PERF_EVENTS),y)
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KBUILD_CFLAGS += -fno-omit-frame-pointer
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endif
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KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
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# GCC versions that support the "-mstrict-align" option default to allowing
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# unaligned accesses. While unaligned accesses are explicitly allowed in the
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# RISC-V ISA, they're emulated by machine mode traps on all extant
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# architectures. It's faster to have GCC emit only aligned accesses.
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KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
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ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
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prepare: stack_protector_prepare
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stack_protector_prepare: prepare0
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$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls \
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-mstack-protector-guard-reg=tp \
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-mstack-protector-guard-offset=$(shell \
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awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
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include/generated/asm-offsets.h))
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endif
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# arch specific predefines for sparse
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CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
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# Default target when executing plain make
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boot := arch/riscv/boot
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KBUILD_IMAGE := $(boot)/Image.gz
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head-y := arch/riscv/kernel/head.o
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core-y += arch/riscv/
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libs-y += arch/riscv/lib/
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libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
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PHONY += vdso_install
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vdso_install:
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$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
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KBUILD_IMAGE := $(boot)/loader.bin
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else
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KBUILD_IMAGE := $(boot)/Image.gz
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endif
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BOOT_TARGETS := Image Image.gz loader loader.bin
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all: $(notdir $(KBUILD_IMAGE))
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$(BOOT_TARGETS): vmlinux
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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@$(kecho) ' Kernel: $(boot)/$@ is ready'
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Image.%: Image
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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zinstall install:
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$(Q)$(MAKE) $(build)=$(boot) $@
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archclean:
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$(Q)$(MAKE) $(clean)=$(boot)
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