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daeb4c0c3b
Most PCI implementations use the standard PCI swizzle function, which handles the well defined behaviour of PCI-to-PCI bridges which can be found on cards (eg, four port ethernet cards.) Rather than having almost every platform specify the standard swizzle function, make this the default when no swizzle function is supplied. Therefore, a swizzle function only needs to be provided when there is something exceptional which needs to be handled. This gets rid of the swizzle initializer from 47 files, and leaves us with just two platforms specifying a swizzle function: ARM Integrator and Chalice CATS. Acked-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
272 lines
6.9 KiB
C
272 lines
6.9 KiB
C
/*
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* Maxtor Shared Storage II Board Setup
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*
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* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/leds.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <linux/ata_platform.h>
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#include <linux/gpio.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <mach/orion5x.h>
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#include <mach/bridge-regs.h>
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#include "common.h"
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#include "mpp.h"
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#define MSS2_NOR_BOOT_BASE 0xff800000
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#define MSS2_NOR_BOOT_SIZE SZ_256K
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/*****************************************************************************
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* Maxtor Shared Storage II Info
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****************************************************************************/
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/*
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* Maxtor Shared Storage II hardware :
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* - Marvell 88F5182-A2 C500
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* - Marvell 88E1111 Gigabit Ethernet PHY
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* - RTC M41T81 (@0x68) on I2C bus
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* - 256KB NOR flash
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* - 64MB of RAM
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*/
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/*****************************************************************************
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* 256KB NOR Flash on BOOT Device
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****************************************************************************/
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static struct physmap_flash_data mss2_nor_flash_data = {
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.width = 1,
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};
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static struct resource mss2_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = MSS2_NOR_BOOT_BASE,
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.end = MSS2_NOR_BOOT_BASE + MSS2_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device mss2_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &mss2_nor_flash_data,
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},
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.resource = &mss2_nor_flash_resource,
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.num_resources = 1,
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};
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/****************************************************************************
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* PCI setup
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****************************************************************************/
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static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq;
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/*
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* Check for devices with hard-wired IRQs.
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*/
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irq = orion5x_pci_map_irq(dev, slot, pin);
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if (irq != -1)
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return irq;
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return -1;
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}
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static struct hw_pci mss2_pci __initdata = {
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.nr_controllers = 2,
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.setup = orion5x_pci_sys_setup,
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.scan = orion5x_pci_sys_scan_bus,
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.map_irq = mss2_pci_map_irq,
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};
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static int __init mss2_pci_init(void)
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{
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if (machine_is_mss2())
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pci_common_init(&mss2_pci);
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return 0;
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}
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subsys_initcall(mss2_pci_init);
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/*****************************************************************************
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* Ethernet
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****************************************************************************/
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static struct mv643xx_eth_platform_data mss2_eth_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(8),
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};
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/*****************************************************************************
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* SATA
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****************************************************************************/
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static struct mv_sata_platform_data mss2_sata_data = {
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.n_ports = 2,
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};
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/*****************************************************************************
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* GPIO buttons
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****************************************************************************/
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#define MSS2_GPIO_KEY_RESET 12
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#define MSS2_GPIO_KEY_POWER 11
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static struct gpio_keys_button mss2_buttons[] = {
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{
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.code = KEY_POWER,
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.gpio = MSS2_GPIO_KEY_POWER,
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.desc = "Power",
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.active_low = 1,
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}, {
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.code = KEY_RESTART,
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.gpio = MSS2_GPIO_KEY_RESET,
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.desc = "Reset",
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.active_low = 1,
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},
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};
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static struct gpio_keys_platform_data mss2_button_data = {
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.buttons = mss2_buttons,
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.nbuttons = ARRAY_SIZE(mss2_buttons),
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};
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static struct platform_device mss2_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.dev = {
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.platform_data = &mss2_button_data,
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},
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};
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/*****************************************************************************
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* RTC m41t81 on I2C bus
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****************************************************************************/
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#define MSS2_GPIO_RTC_IRQ 3
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static struct i2c_board_info __initdata mss2_i2c_rtc = {
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I2C_BOARD_INFO("m41t81", 0x68),
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};
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/*****************************************************************************
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* MSS2 power off method
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****************************************************************************/
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/*
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* On the Maxtor Shared Storage II, the shutdown process is the following :
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* - Userland modifies U-boot env to tell U-boot to go idle at next boot
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* - The board reboots
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* - U-boot starts and go into an idle mode until the user press "power"
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*/
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static void mss2_power_off(void)
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{
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u32 reg;
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/*
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* Enable and issue soft reset
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*/
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reg = readl(RSTOUTn_MASK);
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reg |= 1 << 2;
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writel(reg, RSTOUTn_MASK);
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reg = readl(CPU_SOFT_RESET);
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reg |= 1;
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writel(reg, CPU_SOFT_RESET);
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}
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/****************************************************************************
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* General Setup
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****************************************************************************/
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static unsigned int mss2_mpp_modes[] __initdata = {
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MPP0_GPIO, /* Power LED */
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MPP1_GPIO, /* Error LED */
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MPP2_UNUSED,
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MPP3_GPIO, /* RTC interrupt */
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MPP4_GPIO, /* HDD ind. (Single/Dual)*/
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MPP5_GPIO, /* HD0 5V control */
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MPP6_GPIO, /* HD0 12V control */
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MPP7_GPIO, /* HD1 5V control */
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MPP8_GPIO, /* HD1 12V control */
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MPP9_UNUSED,
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MPP10_GPIO, /* Fan control */
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MPP11_GPIO, /* Power button */
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MPP12_GPIO, /* Reset button */
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MPP13_UNUSED,
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MPP14_SATA_LED, /* SATA 0 active */
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MPP15_SATA_LED, /* SATA 1 active */
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MPP16_UNUSED,
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MPP17_UNUSED,
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MPP18_UNUSED,
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MPP19_UNUSED,
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0,
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};
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static void __init mss2_init(void)
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{
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/* Setup basic Orion functions. Need to be called early. */
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orion5x_init();
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orion5x_mpp_conf(mss2_mpp_modes);
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/*
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* MPP[20] Unused
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* MPP[21] PCI clock
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* MPP[22] USB 0 over current
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* MPP[23] USB 1 over current
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*/
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/*
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* Configure peripherals.
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*/
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orion5x_ehci0_init();
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orion5x_ehci1_init();
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orion5x_eth_init(&mss2_eth_data);
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orion5x_i2c_init();
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orion5x_sata_init(&mss2_sata_data);
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orion5x_uart0_init();
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orion5x_xor_init();
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orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE);
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platform_device_register(&mss2_nor_flash);
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platform_device_register(&mss2_button_device);
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if (gpio_request(MSS2_GPIO_RTC_IRQ, "rtc") == 0) {
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if (gpio_direction_input(MSS2_GPIO_RTC_IRQ) == 0)
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mss2_i2c_rtc.irq = gpio_to_irq(MSS2_GPIO_RTC_IRQ);
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else
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gpio_free(MSS2_GPIO_RTC_IRQ);
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}
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i2c_register_board_info(0, &mss2_i2c_rtc, 1);
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/* register mss2 specific power-off method */
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pm_power_off = mss2_power_off;
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}
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MACHINE_START(MSS2, "Maxtor Shared Storage II")
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/* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
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.atag_offset = 0x100,
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.init_machine = mss2_init,
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.map_io = orion5x_map_io,
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.init_early = orion5x_init_early,
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.init_irq = orion5x_init_irq,
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.timer = &orion5x_timer,
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.fixup = tag_fixup_mem32,
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.restart = orion5x_restart,
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MACHINE_END
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