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c7d54842de
This splits the _PAGE_RW bit into _PAGE_READ and _PAGE_WRITE. It also
removes the dependency on _PAGE_USER for implying read only. Few things
to note here is that, we have read implied with write and execute
permission. Hence we should always find _PAGE_READ set on hash pte
fault.
We still can't switch PROT_NONE to !(_PAGE_RWX). Auto numa depends on
marking a prot none pte _PAGE_WRITE. (For more details look at
b191f9b106
"mm: numa: preserve PTE write permissions across a NUMA
hinting fault")
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jeremy Kerr <jk@ozlabs.org>
Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
379 lines
9.1 KiB
C
379 lines
9.1 KiB
C
/*
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* Copyright 2014 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/workqueue.h>
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#include <linux/sched.h>
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#include <linux/pid.h>
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#include <linux/mm.h>
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#include <linux/moduleparam.h>
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#undef MODULE_PARAM_PREFIX
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#define MODULE_PARAM_PREFIX "cxl" "."
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#include <asm/current.h>
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#include <asm/copro.h>
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#include <asm/mmu.h>
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#include "cxl.h"
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#include "trace.h"
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static bool sste_matches(struct cxl_sste *sste, struct copro_slb *slb)
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{
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return ((sste->vsid_data == cpu_to_be64(slb->vsid)) &&
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(sste->esid_data == cpu_to_be64(slb->esid)));
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}
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/*
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* This finds a free SSTE for the given SLB, or returns NULL if it's already in
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* the segment table.
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*/
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static struct cxl_sste* find_free_sste(struct cxl_context *ctx,
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struct copro_slb *slb)
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{
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struct cxl_sste *primary, *sste, *ret = NULL;
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unsigned int mask = (ctx->sst_size >> 7) - 1; /* SSTP0[SegTableSize] */
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unsigned int entry;
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unsigned int hash;
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if (slb->vsid & SLB_VSID_B_1T)
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hash = (slb->esid >> SID_SHIFT_1T) & mask;
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else /* 256M */
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hash = (slb->esid >> SID_SHIFT) & mask;
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primary = ctx->sstp + (hash << 3);
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for (entry = 0, sste = primary; entry < 8; entry++, sste++) {
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if (!ret && !(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
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ret = sste;
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if (sste_matches(sste, slb))
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return NULL;
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}
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if (ret)
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return ret;
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/* Nothing free, select an entry to cast out */
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ret = primary + ctx->sst_lru;
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ctx->sst_lru = (ctx->sst_lru + 1) & 0x7;
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return ret;
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}
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static void cxl_load_segment(struct cxl_context *ctx, struct copro_slb *slb)
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{
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/* mask is the group index, we search primary and secondary here. */
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struct cxl_sste *sste;
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unsigned long flags;
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spin_lock_irqsave(&ctx->sste_lock, flags);
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sste = find_free_sste(ctx, slb);
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if (!sste)
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goto out_unlock;
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pr_devel("CXL Populating SST[%li]: %#llx %#llx\n",
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sste - ctx->sstp, slb->vsid, slb->esid);
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trace_cxl_ste_write(ctx, sste - ctx->sstp, slb->esid, slb->vsid);
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sste->vsid_data = cpu_to_be64(slb->vsid);
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sste->esid_data = cpu_to_be64(slb->esid);
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out_unlock:
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spin_unlock_irqrestore(&ctx->sste_lock, flags);
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}
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static int cxl_fault_segment(struct cxl_context *ctx, struct mm_struct *mm,
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u64 ea)
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{
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struct copro_slb slb = {0,0};
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int rc;
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if (!(rc = copro_calculate_slb(mm, ea, &slb))) {
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cxl_load_segment(ctx, &slb);
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}
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return rc;
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}
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static void cxl_ack_ae(struct cxl_context *ctx)
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{
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unsigned long flags;
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cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_AE, 0);
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spin_lock_irqsave(&ctx->lock, flags);
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ctx->pending_fault = true;
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ctx->fault_addr = ctx->dar;
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ctx->fault_dsisr = ctx->dsisr;
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spin_unlock_irqrestore(&ctx->lock, flags);
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wake_up_all(&ctx->wq);
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}
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static int cxl_handle_segment_miss(struct cxl_context *ctx,
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struct mm_struct *mm, u64 ea)
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{
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int rc;
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pr_devel("CXL interrupt: Segment fault pe: %i ea: %#llx\n", ctx->pe, ea);
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trace_cxl_ste_miss(ctx, ea);
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if ((rc = cxl_fault_segment(ctx, mm, ea)))
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cxl_ack_ae(ctx);
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else {
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mb(); /* Order seg table write to TFC MMIO write */
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cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
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}
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return IRQ_HANDLED;
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}
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static void cxl_handle_page_fault(struct cxl_context *ctx,
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struct mm_struct *mm, u64 dsisr, u64 dar)
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{
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unsigned flt = 0;
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int result;
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unsigned long access, flags, inv_flags = 0;
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trace_cxl_pte_miss(ctx, dsisr, dar);
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if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) {
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pr_devel("copro_handle_mm_fault failed: %#x\n", result);
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return cxl_ack_ae(ctx);
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}
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/*
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* update_mmu_cache() will not have loaded the hash since current->trap
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* is not a 0x400 or 0x300, so just call hash_page_mm() here.
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*/
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access = _PAGE_PRESENT | _PAGE_READ;
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if (dsisr & CXL_PSL_DSISR_An_S)
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access |= _PAGE_WRITE;
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if ((!ctx->kernel) || (REGION_ID(dar) == USER_REGION_ID))
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access |= _PAGE_USER;
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if (dsisr & DSISR_NOHPTE)
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inv_flags |= HPTE_NOHPTE_UPDATE;
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local_irq_save(flags);
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hash_page_mm(mm, dar, access, 0x300, inv_flags);
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local_irq_restore(flags);
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pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe);
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cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
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}
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/*
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* Returns the mm_struct corresponding to the context ctx via ctx->pid
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* In case the task has exited we use the task group leader accessible
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* via ctx->glpid to find the next task in the thread group that has a
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* valid mm_struct associated with it. If a task with valid mm_struct
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* is found the ctx->pid is updated to use the task struct for subsequent
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* translations. In case no valid mm_struct is found in the task group to
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* service the fault a NULL is returned.
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*/
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static struct mm_struct *get_mem_context(struct cxl_context *ctx)
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{
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struct task_struct *task = NULL;
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struct mm_struct *mm = NULL;
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struct pid *old_pid = ctx->pid;
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if (old_pid == NULL) {
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pr_warn("%s: Invalid context for pe=%d\n",
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__func__, ctx->pe);
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return NULL;
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}
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task = get_pid_task(old_pid, PIDTYPE_PID);
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/*
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* pid_alive may look racy but this saves us from costly
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* get_task_mm when the task is a zombie. In worst case
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* we may think a task is alive, which is about to die
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* but get_task_mm will return NULL.
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*/
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if (task != NULL && pid_alive(task))
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mm = get_task_mm(task);
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/* release the task struct that was taken earlier */
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if (task)
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put_task_struct(task);
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else
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pr_devel("%s: Context owning pid=%i for pe=%i dead\n",
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__func__, pid_nr(old_pid), ctx->pe);
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/*
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* If we couldn't find the mm context then use the group
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* leader to iterate over the task group and find a task
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* that gives us mm_struct.
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*/
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if (unlikely(mm == NULL && ctx->glpid != NULL)) {
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rcu_read_lock();
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task = pid_task(ctx->glpid, PIDTYPE_PID);
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if (task)
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do {
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mm = get_task_mm(task);
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if (mm) {
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ctx->pid = get_task_pid(task,
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PIDTYPE_PID);
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break;
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}
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task = next_thread(task);
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} while (task && !thread_group_leader(task));
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rcu_read_unlock();
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/* check if we switched pid */
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if (ctx->pid != old_pid) {
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if (mm)
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pr_devel("%s:pe=%i switch pid %i->%i\n",
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__func__, ctx->pe, pid_nr(old_pid),
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pid_nr(ctx->pid));
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else
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pr_devel("%s:Cannot find mm for pid=%i\n",
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__func__, pid_nr(old_pid));
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/* drop the reference to older pid */
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put_pid(old_pid);
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}
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}
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return mm;
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}
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void cxl_handle_fault(struct work_struct *fault_work)
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{
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struct cxl_context *ctx =
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container_of(fault_work, struct cxl_context, fault_work);
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u64 dsisr = ctx->dsisr;
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u64 dar = ctx->dar;
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struct mm_struct *mm = NULL;
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if (cpu_has_feature(CPU_FTR_HVMODE)) {
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if (cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An) != dsisr ||
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cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar ||
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cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) != ctx->pe) {
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/* Most likely explanation is harmless - a dedicated
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* process has detached and these were cleared by the
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* PSL purge, but warn about it just in case
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*/
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dev_notice(&ctx->afu->dev, "cxl_handle_fault: Translation fault regs changed\n");
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return;
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}
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}
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/* Early return if the context is being / has been detached */
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if (ctx->status == CLOSED) {
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cxl_ack_ae(ctx);
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return;
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}
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pr_devel("CXL BOTTOM HALF handling fault for afu pe: %i. "
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"DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar);
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if (!ctx->kernel) {
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mm = get_mem_context(ctx);
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/* indicates all the thread in task group have exited */
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if (mm == NULL) {
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pr_devel("%s: unable to get mm for pe=%d pid=%i\n",
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__func__, ctx->pe, pid_nr(ctx->pid));
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cxl_ack_ae(ctx);
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return;
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} else {
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pr_devel("Handling page fault for pe=%d pid=%i\n",
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ctx->pe, pid_nr(ctx->pid));
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}
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}
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if (dsisr & CXL_PSL_DSISR_An_DS)
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cxl_handle_segment_miss(ctx, mm, dar);
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else if (dsisr & CXL_PSL_DSISR_An_DM)
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cxl_handle_page_fault(ctx, mm, dsisr, dar);
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else
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WARN(1, "cxl_handle_fault has nothing to handle\n");
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if (mm)
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mmput(mm);
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}
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static void cxl_prefault_one(struct cxl_context *ctx, u64 ea)
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{
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struct mm_struct *mm;
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mm = get_mem_context(ctx);
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if (mm == NULL) {
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pr_devel("cxl_prefault_one unable to get mm %i\n",
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pid_nr(ctx->pid));
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return;
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}
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cxl_fault_segment(ctx, mm, ea);
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mmput(mm);
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}
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static u64 next_segment(u64 ea, u64 vsid)
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{
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if (vsid & SLB_VSID_B_1T)
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ea |= (1ULL << 40) - 1;
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else
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ea |= (1ULL << 28) - 1;
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return ea + 1;
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}
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static void cxl_prefault_vma(struct cxl_context *ctx)
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{
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u64 ea, last_esid = 0;
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struct copro_slb slb;
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struct vm_area_struct *vma;
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int rc;
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struct mm_struct *mm;
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mm = get_mem_context(ctx);
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if (mm == NULL) {
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pr_devel("cxl_prefault_vm unable to get mm %i\n",
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pid_nr(ctx->pid));
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return;
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}
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down_read(&mm->mmap_sem);
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for (vma = mm->mmap; vma; vma = vma->vm_next) {
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for (ea = vma->vm_start; ea < vma->vm_end;
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ea = next_segment(ea, slb.vsid)) {
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rc = copro_calculate_slb(mm, ea, &slb);
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if (rc)
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continue;
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if (last_esid == slb.esid)
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continue;
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cxl_load_segment(ctx, &slb);
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last_esid = slb.esid;
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}
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}
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up_read(&mm->mmap_sem);
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mmput(mm);
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}
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void cxl_prefault(struct cxl_context *ctx, u64 wed)
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{
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switch (ctx->afu->prefault_mode) {
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case CXL_PREFAULT_WED:
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cxl_prefault_one(ctx, wed);
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break;
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case CXL_PREFAULT_ALL:
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cxl_prefault_vma(ctx);
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break;
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default:
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break;
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}
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}
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