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367b8112fe
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
169 lines
3.7 KiB
C
169 lines
3.7 KiB
C
/*
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* include/asm-xtensa/rwsem.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Largely copied from include/asm-ppc/rwsem.h
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_RWSEM_H
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#define _XTENSA_RWSEM_H
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#ifndef _LINUX_RWSEM_H
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#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
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#endif
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <asm/atomic.h>
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#include <asm/system.h>
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/*
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* the semaphore definition
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*/
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struct rw_semaphore {
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signed long count;
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#define RWSEM_UNLOCKED_VALUE 0x00000000
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#define RWSEM_ACTIVE_BIAS 0x00000001
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#define RWSEM_ACTIVE_MASK 0x0000ffff
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#define RWSEM_WAITING_BIAS (-0x00010000)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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spinlock_t wait_lock;
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struct list_head wait_list;
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};
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#define __RWSEM_INITIALIZER(name) \
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{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
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LIST_HEAD_INIT((name).wait_list) }
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#define DECLARE_RWSEM(name) \
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struct rw_semaphore name = __RWSEM_INITIALIZER(name)
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extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
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extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
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extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
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extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
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static inline void init_rwsem(struct rw_semaphore *sem)
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{
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sem->count = RWSEM_UNLOCKED_VALUE;
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spin_lock_init(&sem->wait_lock);
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INIT_LIST_HEAD(&sem->wait_list);
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}
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/*
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* lock for reading
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*/
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static inline void __down_read(struct rw_semaphore *sem)
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{
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if (atomic_add_return(1,(atomic_t *)(&sem->count)) > 0)
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smp_wmb();
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else
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rwsem_down_read_failed(sem);
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}
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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int tmp;
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while ((tmp = sem->count) >= 0) {
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if (tmp == cmpxchg(&sem->count, tmp,
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tmp + RWSEM_ACTIVE_READ_BIAS)) {
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smp_wmb();
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return 1;
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}
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}
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return 0;
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}
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/*
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* lock for writing
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*/
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static inline void __down_write(struct rw_semaphore *sem)
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{
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int tmp;
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tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
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(atomic_t *)(&sem->count));
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if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
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smp_wmb();
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else
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rwsem_down_write_failed(sem);
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}
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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int tmp;
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tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
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RWSEM_ACTIVE_WRITE_BIAS);
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smp_wmb();
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return tmp == RWSEM_UNLOCKED_VALUE;
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}
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/*
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* unlock after reading
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*/
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static inline void __up_read(struct rw_semaphore *sem)
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{
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int tmp;
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smp_wmb();
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tmp = atomic_sub_return(1,(atomic_t *)(&sem->count));
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if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
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rwsem_wake(sem);
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}
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/*
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* unlock after writing
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*/
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static inline void __up_write(struct rw_semaphore *sem)
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{
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smp_wmb();
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if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
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(atomic_t *)(&sem->count)) < 0)
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rwsem_wake(sem);
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}
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/*
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* implement atomic add functionality
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*/
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static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
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{
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atomic_add(delta, (atomic_t *)(&sem->count));
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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int tmp;
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smp_wmb();
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tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
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if (tmp < 0)
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rwsem_downgrade_wake(sem);
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}
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/*
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* implement exchange and add functionality
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*/
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static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
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{
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smp_mb();
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return atomic_add_return(delta, (atomic_t *)(&sem->count));
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}
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static inline int rwsem_is_locked(struct rw_semaphore *sem)
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{
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return (sem->count != 0);
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}
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#endif /* _XTENSA_RWSEM_H */
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