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65b6657672
Allwinner H6 SoC has multiplier N range between 1 and 254. Since parent rate is 24MHz, intermediate result when calculating final rate easily overflows 32 bit variable. Because of that, introduce function for calculating clock rate which uses 64 bit variable for intermediate result. Fixes:6174a1e24b
("clk: sunxi-ng: Add N-M-factor clock support") Fixes:ee28648cb2
("clk: sunxi-ng: Remove the use of rational computations") CC: <stable@vger.kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
244 lines
5.9 KiB
C
244 lines
5.9 KiB
C
/*
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* Copyright (C) 2016 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <linux/clk-provider.h>
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#include "ccu_frac.h"
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#include "ccu_gate.h"
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#include "ccu_nm.h"
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struct _ccu_nm {
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unsigned long n, min_n, max_n;
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unsigned long m, min_m, max_m;
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};
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static unsigned long ccu_nm_calc_rate(unsigned long parent,
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unsigned long n, unsigned long m)
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{
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u64 rate = parent;
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rate *= n;
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do_div(rate, m);
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return rate;
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}
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static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
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struct _ccu_nm *nm)
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{
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unsigned long best_rate = 0;
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unsigned long best_n = 0, best_m = 0;
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unsigned long _n, _m;
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for (_n = nm->min_n; _n <= nm->max_n; _n++) {
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for (_m = nm->min_m; _m <= nm->max_m; _m++) {
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unsigned long tmp_rate = ccu_nm_calc_rate(parent,
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_n, _m);
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if (tmp_rate > rate)
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continue;
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if ((rate - tmp_rate) < (rate - best_rate)) {
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best_rate = tmp_rate;
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best_n = _n;
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best_m = _m;
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}
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}
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}
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nm->n = best_n;
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nm->m = best_m;
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}
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static void ccu_nm_disable(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_disable(&nm->common, nm->enable);
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}
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static int ccu_nm_enable(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_enable(&nm->common, nm->enable);
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}
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static int ccu_nm_is_enabled(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_is_enabled(&nm->common, nm->enable);
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}
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static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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unsigned long rate;
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unsigned long n, m;
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u32 reg;
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if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) {
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rate = ccu_frac_helper_read_rate(&nm->common, &nm->frac);
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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reg = readl(nm->common.base + nm->common.reg);
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n = reg >> nm->n.shift;
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n &= (1 << nm->n.width) - 1;
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n += nm->n.offset;
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if (!n)
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n++;
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m = reg >> nm->m.shift;
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m &= (1 << nm->m.width) - 1;
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m += nm->m.offset;
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if (!m)
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m++;
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if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm))
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rate = ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n);
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else
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rate = ccu_nm_calc_rate(parent_rate, n, m);
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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struct _ccu_nm _nm;
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate *= nm->fixed_post_div;
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if (rate < nm->min_rate) {
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rate = nm->min_rate;
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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if (nm->max_rate && rate > nm->max_rate) {
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rate = nm->max_rate;
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) {
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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_nm.min_n = nm->n.min ?: 1;
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_nm.max_n = nm->n.max ?: 1 << nm->n.width;
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_nm.min_m = 1;
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_nm.max_m = nm->m.max ?: 1 << nm->m.width;
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ccu_nm_find_best(*parent_rate, rate, &_nm);
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rate = ccu_nm_calc_rate(*parent_rate, _nm.n, _nm.m);
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate /= nm->fixed_post_div;
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return rate;
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}
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static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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struct _ccu_nm _nm;
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unsigned long flags;
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u32 reg;
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/* Adjust target rate according to post-dividers */
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if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
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rate = rate * nm->fixed_post_div;
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if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
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spin_lock_irqsave(nm->common.lock, flags);
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/* most SoCs require M to be 0 if fractional mode is used */
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reg = readl(nm->common.base + nm->common.reg);
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reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
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writel(reg, nm->common.base + nm->common.reg);
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spin_unlock_irqrestore(nm->common.lock, flags);
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ccu_frac_helper_enable(&nm->common, &nm->frac);
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return ccu_frac_helper_set_rate(&nm->common, &nm->frac,
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rate, nm->lock);
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} else {
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ccu_frac_helper_disable(&nm->common, &nm->frac);
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}
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_nm.min_n = nm->n.min ?: 1;
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_nm.max_n = nm->n.max ?: 1 << nm->n.width;
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_nm.min_m = 1;
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_nm.max_m = nm->m.max ?: 1 << nm->m.width;
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if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) {
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ccu_sdm_helper_enable(&nm->common, &nm->sdm, rate);
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/* Sigma delta modulation requires specific N and M factors */
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ccu_sdm_helper_get_factors(&nm->common, &nm->sdm, rate,
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&_nm.m, &_nm.n);
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} else {
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ccu_sdm_helper_disable(&nm->common, &nm->sdm);
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ccu_nm_find_best(parent_rate, rate, &_nm);
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}
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spin_lock_irqsave(nm->common.lock, flags);
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reg = readl(nm->common.base + nm->common.reg);
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reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
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reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
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reg |= (_nm.n - nm->n.offset) << nm->n.shift;
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reg |= (_nm.m - nm->m.offset) << nm->m.shift;
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writel(reg, nm->common.base + nm->common.reg);
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spin_unlock_irqrestore(nm->common.lock, flags);
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ccu_helper_wait_for_lock(&nm->common, nm->lock);
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return 0;
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}
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const struct clk_ops ccu_nm_ops = {
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.disable = ccu_nm_disable,
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.enable = ccu_nm_enable,
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.is_enabled = ccu_nm_is_enabled,
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.recalc_rate = ccu_nm_recalc_rate,
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.round_rate = ccu_nm_round_rate,
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.set_rate = ccu_nm_set_rate,
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};
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