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46d4a403a0
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>
369 lines
8.8 KiB
C
369 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for the on-board character LCD found on some ARM reference boards
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* This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
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* https://en.wikipedia.org/wiki/HD44780_Character_LCD
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* Currently it will just display the text "ARM Linux" and the linux version
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*
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* Author: Linus Walleij <triad@df.lth.se>
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <generated/utsrelease.h>
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#define DRIVERNAME "arm-charlcd"
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#define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
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/* Offsets to registers */
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#define CHAR_COM 0x00U
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#define CHAR_DAT 0x04U
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#define CHAR_RD 0x08U
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#define CHAR_RAW 0x0CU
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#define CHAR_MASK 0x10U
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#define CHAR_STAT 0x14U
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#define CHAR_RAW_CLEAR 0x00000000U
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#define CHAR_RAW_VALID 0x00000100U
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/* Hitachi HD44780 display commands */
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#define HD_CLEAR 0x01U
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#define HD_HOME 0x02U
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#define HD_ENTRYMODE 0x04U
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#define HD_ENTRYMODE_INCREMENT 0x02U
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#define HD_ENTRYMODE_SHIFT 0x01U
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#define HD_DISPCTRL 0x08U
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#define HD_DISPCTRL_ON 0x04U
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#define HD_DISPCTRL_CURSOR_ON 0x02U
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#define HD_DISPCTRL_CURSOR_BLINK 0x01U
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#define HD_CRSR_SHIFT 0x10U
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#define HD_CRSR_SHIFT_DISPLAY 0x08U
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#define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U
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#define HD_FUNCSET 0x20U
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#define HD_FUNCSET_8BIT 0x10U
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#define HD_FUNCSET_2_LINES 0x08U
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#define HD_FUNCSET_FONT_5X10 0x04U
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#define HD_SET_CGRAM 0x40U
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#define HD_SET_DDRAM 0x80U
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#define HD_BUSY_FLAG 0x80U
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/**
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* struct charlcd - Private data structure
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* @dev: a pointer back to containing device
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* @phybase: the offset to the controller in physical memory
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* @physize: the size of the physical page
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* @virtbase: the offset to the controller in virtual memory
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* @irq: reserved interrupt number
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* @complete: completion structure for the last LCD command
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* @init_work: delayed work structure to initialize the display on boot
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*/
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struct charlcd {
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struct device *dev;
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u32 phybase;
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u32 physize;
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void __iomem *virtbase;
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int irq;
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struct completion complete;
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struct delayed_work init_work;
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};
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static irqreturn_t charlcd_interrupt(int irq, void *data)
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{
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struct charlcd *lcd = data;
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u8 status;
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status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
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/* Clear IRQ */
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writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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if (status)
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complete(&lcd->complete);
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else
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dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
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return IRQ_HANDLED;
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}
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static void charlcd_wait_complete_irq(struct charlcd *lcd)
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{
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int ret;
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ret = wait_for_completion_interruptible_timeout(&lcd->complete,
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CHARLCD_TIMEOUT);
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/* Disable IRQ after completion */
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writel(0x00, lcd->virtbase + CHAR_MASK);
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if (ret < 0) {
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dev_err(lcd->dev,
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"wait_for_completion_interruptible_timeout() "
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"returned %d waiting for ready\n", ret);
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return;
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}
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if (ret == 0) {
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dev_err(lcd->dev, "charlcd controller timed out "
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"waiting for ready\n");
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return;
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}
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}
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static u8 charlcd_4bit_read_char(struct charlcd *lcd)
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{
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u8 data;
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u32 val;
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int i;
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/* If we can, use an IRQ to wait for the data, else poll */
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if (lcd->irq >= 0)
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charlcd_wait_complete_irq(lcd);
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else {
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i = 0;
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val = 0;
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while (!(val & CHAR_RAW_VALID) && i < 10) {
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udelay(100);
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val = readl(lcd->virtbase + CHAR_RAW);
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i++;
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}
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writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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}
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msleep(1);
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/* Read the 4 high bits of the data */
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data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
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/*
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* The second read for the low bits does not trigger an IRQ
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* so in this case we have to poll for the 4 lower bits
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*/
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i = 0;
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val = 0;
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while (!(val & CHAR_RAW_VALID) && i < 10) {
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udelay(100);
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val = readl(lcd->virtbase + CHAR_RAW);
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i++;
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}
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writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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msleep(1);
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/* Read the 4 low bits of the data */
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data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
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return data;
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}
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static bool charlcd_4bit_read_bf(struct charlcd *lcd)
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{
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if (lcd->irq >= 0) {
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/*
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* If we'll use IRQs to wait for the busyflag, clear any
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* pending flag and enable IRQ
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*/
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writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
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init_completion(&lcd->complete);
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writel(0x01, lcd->virtbase + CHAR_MASK);
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}
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readl(lcd->virtbase + CHAR_COM);
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return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG ? true : false;
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}
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static void charlcd_4bit_wait_busy(struct charlcd *lcd)
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{
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int retries = 50;
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udelay(100);
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while (charlcd_4bit_read_bf(lcd) && retries)
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retries--;
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if (!retries)
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dev_err(lcd->dev, "timeout waiting for busyflag\n");
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}
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static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
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{
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u32 cmdlo = (cmd << 4) & 0xf0;
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u32 cmdhi = (cmd & 0xf0);
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writel(cmdhi, lcd->virtbase + CHAR_COM);
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udelay(10);
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writel(cmdlo, lcd->virtbase + CHAR_COM);
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charlcd_4bit_wait_busy(lcd);
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}
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static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
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{
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u32 chlo = (ch << 4) & 0xf0;
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u32 chhi = (ch & 0xf0);
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writel(chhi, lcd->virtbase + CHAR_DAT);
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udelay(10);
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writel(chlo, lcd->virtbase + CHAR_DAT);
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charlcd_4bit_wait_busy(lcd);
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}
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static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
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{
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u8 offset;
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int i;
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/*
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* We support line 0, 1
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* Line 1 runs from 0x00..0x27
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* Line 2 runs from 0x28..0x4f
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*/
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if (line == 0)
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offset = 0;
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else if (line == 1)
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offset = 0x28;
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else
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return;
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/* Set offset */
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charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
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/* Send string */
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for (i = 0; i < strlen(str) && i < 0x28; i++)
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charlcd_4bit_char(lcd, str[i]);
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}
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static void charlcd_4bit_init(struct charlcd *lcd)
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{
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/* These commands cannot be checked with the busy flag */
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writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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msleep(5);
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writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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udelay(100);
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writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
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udelay(100);
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/* Go to 4bit mode */
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writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
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udelay(100);
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/*
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* 4bit mode, 2 lines, 5x8 font, after this the number of lines
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* and the font cannot be changed until the next initialization sequence
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*/
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charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
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charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
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charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
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charlcd_4bit_command(lcd, HD_CLEAR);
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charlcd_4bit_command(lcd, HD_HOME);
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/* Put something useful in the display */
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charlcd_4bit_print(lcd, 0, "ARM Linux");
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charlcd_4bit_print(lcd, 1, UTS_RELEASE);
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}
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static void charlcd_init_work(struct work_struct *work)
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{
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struct charlcd *lcd =
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container_of(work, struct charlcd, init_work.work);
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charlcd_4bit_init(lcd);
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}
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static int __init charlcd_probe(struct platform_device *pdev)
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{
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int ret;
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struct charlcd *lcd;
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struct resource *res;
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lcd = kzalloc(sizeof(struct charlcd), GFP_KERNEL);
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if (!lcd)
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return -ENOMEM;
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lcd->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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ret = -ENOENT;
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goto out_no_resource;
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}
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lcd->phybase = res->start;
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lcd->physize = resource_size(res);
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if (request_mem_region(lcd->phybase, lcd->physize,
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DRIVERNAME) == NULL) {
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ret = -EBUSY;
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goto out_no_memregion;
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}
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lcd->virtbase = ioremap(lcd->phybase, lcd->physize);
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if (!lcd->virtbase) {
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ret = -ENOMEM;
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goto out_no_memregion;
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}
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lcd->irq = platform_get_irq(pdev, 0);
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/* If no IRQ is supplied, we'll survive without it */
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if (lcd->irq >= 0) {
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if (request_irq(lcd->irq, charlcd_interrupt, 0,
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DRIVERNAME, lcd)) {
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ret = -EIO;
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goto out_no_irq;
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}
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}
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platform_set_drvdata(pdev, lcd);
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/*
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* Initialize the display in a delayed work, because
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* it is VERY slow and would slow down the boot of the system.
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*/
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INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
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schedule_delayed_work(&lcd->init_work, 0);
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dev_info(&pdev->dev, "initialized ARM character LCD at %08x\n",
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lcd->phybase);
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return 0;
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out_no_irq:
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iounmap(lcd->virtbase);
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out_no_memregion:
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release_mem_region(lcd->phybase, SZ_4K);
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out_no_resource:
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kfree(lcd);
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return ret;
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}
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static int charlcd_suspend(struct device *dev)
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{
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struct charlcd *lcd = dev_get_drvdata(dev);
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/* Power the display off */
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charlcd_4bit_command(lcd, HD_DISPCTRL);
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return 0;
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}
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static int charlcd_resume(struct device *dev)
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{
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struct charlcd *lcd = dev_get_drvdata(dev);
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/* Turn the display back on */
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charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
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return 0;
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}
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static const struct dev_pm_ops charlcd_pm_ops = {
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.suspend = charlcd_suspend,
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.resume = charlcd_resume,
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};
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static const struct of_device_id charlcd_match[] = {
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{ .compatible = "arm,versatile-lcd", },
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{}
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};
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static struct platform_driver charlcd_driver = {
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.driver = {
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.name = DRIVERNAME,
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.pm = &charlcd_pm_ops,
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.suppress_bind_attrs = true,
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.of_match_table = of_match_ptr(charlcd_match),
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},
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};
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builtin_platform_driver_probe(charlcd_driver, charlcd_probe);
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