Tushar Behera 37746c9a2d clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3} ... commit 688f7d8c9f ("clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}") incorrectly sets the divider for sclk_mmc{0,1,2,3} to fix the wrong clock value. Though this fixed issue with Arndale, it created regressions for other boards like Snow. On Exynos5250, sclk_mmc<n> is generated like below (as per the clock names in drivers/clk/samsung/clk-exynos5250.c) mout_group1_p ==> mout_mmc<n> ==> div_mmc<n> ==> div_mmc_pre<n> => sclk_mmc<n> Earlier div_mmc<n> was set as the parent for sclk_mmc<n>, hence div_mmc_pre<n> was not getting referred in kernel code and depending on its value set during preboot, sclk_mmc<n> value was different for various boards. Setting the correct clock generation path should fix the issues reported in above referenced commit. The changes committed during the earlier patch has also been reverted here. Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>		2013-04-23 19:51:30 -07:00
..
mmp	clk: mmp: add clock definition for mmp2	2012-08-28 14:15:42 -07:00
mvebu	cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs	2013-02-09 12:56:08 +01:00
mxs	clk: mxs: Fix sparse warnings	2013-03-19 12:58:41 -07:00
samsung	clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3}	2013-04-23 19:51:30 -07:00
socfpga	ARM: socfpga: initial support for Altera's SOCFPGA platform	2012-07-19 10:39:00 +02:00
spear	clk:SPEAr1340: Correct parent clock configuration	2013-03-21 14:36:55 -07:00
sunxi	clk: sunxi: rename compatible strings	2013-03-27 08:35:35 -07:00
tegra	clk: tegra: fix enum tegra114_clk to match binding	2013-04-04 17:17:14 -06:00
ux500	clk: ux500: Fix prcmu clocks registration	2013-03-27 08:35:33 -07:00
versatile	arm-soc: driver specific changes	2013-02-21 15:12:18 -08:00
x86	clk: x86: add support for Lynxpoint LPSS clocks	2013-01-23 21:14:22 +01:00
clk-axi-clkgen.c	clk: Add axi-clkgen driver	2013-03-19 17:20:30 -07:00
clk-bcm2835.c	clk: bcm2835: probe for fixed-clock in device tree	2013-01-14 21:46:59 -07:00
clk-composite.c	clk: Add composite clock type	2013-03-26 12:51:48 -07:00
clk-devres.c	ARM: 7537/1: clk: Fix release in devm_clk_put()	2012-09-19 21:51:27 +01:00
clk-divider.c	clk-divider: fix macros	2013-01-18 09:44:02 -08:00
clk-fixed-factor.c	clk: fixed-factor: round_rate should use do_div	2013-01-11 18:43:27 -08:00
clk-fixed-rate.c	clk: add common of_clk_init() function	2013-01-24 11:09:28 -08:00
clk-gate.c	clk: Add CLK_IS_BASIC flag to identify basic clocks	2012-07-11 15:36:43 -07:00
clk-highbank.c	ACPI and power management updates for 3.9-rc1	2013-02-20 11:26:56 -08:00
clk-ls1x.c	clk: add Loongson1B clock support	2012-08-31 11:05:18 -07:00
clk-max77686.c	clk: max77686: Avoid double free at remove time	2013-01-15 16:16:26 -08:00
clk-mux.c	clk: add table lookup to mux	2013-03-22 15:18:18 -07:00
clk-nomadik.c	ARM: nomadik: switch over to using the FSMC driver	2012-11-15 15:37:47 +02:00
clk-prima2.c	clk: prima2: fix return value check in sirfsoc_of_clk_init()	2013-03-22 15:16:31 -07:00
clk-twl6040.c	Drivers: misc: remove __dev* attributes.	2013-01-03 15:57:16 -08:00
clk-u300.c	ARM: u300: convert to common clock	2012-07-11 15:36:45 -07:00
clk-vt8500.c	clk: vt8500: Fix "fix device clock divisor calculations"	2013-03-14 22:34:26 +01:00
clk-wm831x.c	Driver core updates for 3.8-rc1	2012-12-11 13:13:55 -08:00
clk-zynq.c	clk: zynq: Add missing zynq clk header	2013-03-27 08:44:07 -07:00
clk.c	clk: allow reentrant calls into the clk framework	2013-04-02 10:23:41 -07:00
clkdev.c	ARM: 7534/1: clk: Make the managed clk functions generically available	2012-09-15 21:55:27 +01:00
Kconfig	clk: Add axi-clkgen driver	2013-03-19 17:20:30 -07:00
Makefile	add suppport common clock framework for exynos	2013-04-09 22:28:45 +02:00