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faac764ea1
There's a special branch in the set_tdm_slot op for the case of nslots
being 1, but:
(1) That branch can never work (there's a check for tx_mask being
non-zero, later there's another check for it *being* zero; one or
the other always throws -EINVAL).
(2) The intention of the branch seems to be what the general other
branch reduces to in case of nslots being 1.
For those reasons remove the 'nslots being 1' special case.
Fixes: 827ed8a0fa
("ASoC: tas2764: Add the driver for the TAS2764")
Suggested-by: Jos Dehaes <jos.dehaes@gmail.com>
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20221027095800.16094-2-povik+lin@cutebit.org
Signed-off-by: Mark Brown <broonie@kernel.org>
767 lines
19 KiB
C
767 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Driver for the Texas Instruments TAS2764 CODEC
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// Copyright (C) 2020 Texas Instruments Inc.
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "tas2764.h"
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struct tas2764_priv {
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struct snd_soc_component *component;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *sdz_gpio;
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struct regmap *regmap;
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struct device *dev;
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int irq;
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int v_sense_slot;
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int i_sense_slot;
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bool dac_powered;
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bool unmuted;
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};
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static const char *tas2764_int_ltch0_msgs[8] = {
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"fault: over temperature", /* INT_LTCH0 & BIT(0) */
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"fault: over current",
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"fault: bad TDM clock",
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"limiter active",
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"fault: PVDD below limiter inflection point",
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"fault: limiter max attenuation",
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"fault: BOP infinite hold",
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"fault: BOP mute", /* INT_LTCH0 & BIT(7) */
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};
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static const unsigned int tas2764_int_readout_regs[6] = {
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TAS2764_INT_LTCH0,
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TAS2764_INT_LTCH1,
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TAS2764_INT_LTCH1_0,
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TAS2764_INT_LTCH2,
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TAS2764_INT_LTCH3,
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TAS2764_INT_LTCH4,
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};
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static irqreturn_t tas2764_irq(int irq, void *data)
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{
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struct tas2764_priv *tas2764 = data;
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u8 latched[6] = {0, 0, 0, 0, 0, 0};
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int ret = IRQ_NONE;
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int i;
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for (i = 0; i < ARRAY_SIZE(latched); i++)
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latched[i] = snd_soc_component_read(tas2764->component,
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tas2764_int_readout_regs[i]);
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for (i = 0; i < 8; i++) {
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if (latched[0] & BIT(i)) {
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dev_crit_ratelimited(tas2764->dev, "%s\n",
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tas2764_int_ltch0_msgs[i]);
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ret = IRQ_HANDLED;
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}
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}
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if (latched[0]) {
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dev_err_ratelimited(tas2764->dev, "other context to the fault: %02x,%02x,%02x,%02x,%02x",
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latched[1], latched[2], latched[3], latched[4], latched[5]);
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snd_soc_component_update_bits(tas2764->component,
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TAS2764_INT_CLK_CFG,
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TAS2764_INT_CLK_CFG_IRQZ_CLR,
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TAS2764_INT_CLK_CFG_IRQZ_CLR);
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}
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return ret;
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}
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static void tas2764_reset(struct tas2764_priv *tas2764)
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{
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if (tas2764->reset_gpio) {
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gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
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msleep(20);
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gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
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usleep_range(1000, 2000);
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}
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snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
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TAS2764_RST);
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usleep_range(1000, 2000);
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}
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static int tas2764_update_pwr_ctrl(struct tas2764_priv *tas2764)
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{
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struct snd_soc_component *component = tas2764->component;
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unsigned int val;
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int ret;
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if (tas2764->dac_powered)
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val = tas2764->unmuted ?
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TAS2764_PWR_CTRL_ACTIVE : TAS2764_PWR_CTRL_MUTE;
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else
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val = TAS2764_PWR_CTRL_SHUTDOWN;
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK, val);
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if (ret < 0)
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return ret;
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return 0;
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}
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#ifdef CONFIG_PM
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static int tas2764_codec_suspend(struct snd_soc_component *component)
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{
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_SHUTDOWN);
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if (ret < 0)
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return ret;
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if (tas2764->sdz_gpio)
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gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
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regcache_cache_only(tas2764->regmap, true);
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regcache_mark_dirty(tas2764->regmap);
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return 0;
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}
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static int tas2764_codec_resume(struct snd_soc_component *component)
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{
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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if (tas2764->sdz_gpio) {
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gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
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usleep_range(1000, 2000);
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}
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ret = tas2764_update_pwr_ctrl(tas2764);
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if (ret < 0)
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return ret;
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regcache_cache_only(tas2764->regmap, false);
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return regcache_sync(tas2764->regmap);
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}
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#else
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#define tas2764_codec_suspend NULL
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#define tas2764_codec_resume NULL
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#endif
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static const char * const tas2764_ASI1_src[] = {
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"I2C offset", "Left", "Right", "LeftRightDiv2",
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};
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static SOC_ENUM_SINGLE_DECL(
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tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, TAS2764_TDM_CFG2_SCFG_SHIFT,
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tas2764_ASI1_src);
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static const struct snd_kcontrol_new tas2764_asi1_mux =
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SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
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static int tas2764_dac_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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tas2764->dac_powered = true;
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ret = tas2764_update_pwr_ctrl(tas2764);
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break;
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case SND_SOC_DAPM_PRE_PMD:
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tas2764->dac_powered = false;
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ret = tas2764_update_pwr_ctrl(tas2764);
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break;
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default:
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dev_err(tas2764->dev, "Unsupported event\n");
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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return 0;
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}
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static const struct snd_kcontrol_new isense_switch =
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SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
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static const struct snd_kcontrol_new vsense_switch =
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SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
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static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
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SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
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1, &isense_switch),
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SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
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1, &vsense_switch),
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SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2764_dac_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUTPUT("OUT"),
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SND_SOC_DAPM_SIGGEN("VMON"),
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SND_SOC_DAPM_SIGGEN("IMON")
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};
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static const struct snd_soc_dapm_route tas2764_audio_map[] = {
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{"ASI1 Sel", "I2C offset", "ASI1"},
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{"ASI1 Sel", "Left", "ASI1"},
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{"ASI1 Sel", "Right", "ASI1"},
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{"ASI1 Sel", "LeftRightDiv2", "ASI1"},
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{"DAC", NULL, "ASI1 Sel"},
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{"OUT", NULL, "DAC"},
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{"ISENSE", "Switch", "IMON"},
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{"VSENSE", "Switch", "VMON"},
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};
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static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct tas2764_priv *tas2764 =
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snd_soc_component_get_drvdata(dai->component);
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tas2764->unmuted = !mute;
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return tas2764_update_pwr_ctrl(tas2764);
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}
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static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
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{
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struct snd_soc_component *component = tas2764->component;
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int sense_en;
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int val;
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int ret;
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switch (bitwidth) {
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case SNDRV_PCM_FORMAT_S16_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_16BITS);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_24BITS);
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_32BITS);
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break;
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default:
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
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if (val < 0)
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return val;
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if (val & (1 << TAS2764_VSENSE_POWER_EN))
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sense_en = 0;
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else
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sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
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ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
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TAS2764_TDM_CFG5_VSNS_ENABLE,
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sense_en);
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if (ret < 0)
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return ret;
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if (val & (1 << TAS2764_ISENSE_POWER_EN))
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sense_en = 0;
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else
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sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
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ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
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TAS2764_TDM_CFG6_ISNS_ENABLE,
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sense_en);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
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{
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struct snd_soc_component *component = tas2764->component;
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int ramp_rate_val;
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int ret;
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switch (samplerate) {
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case 48000:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
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TAS2764_TDM_CFG0_44_1_48KHZ;
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break;
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case 44100:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
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TAS2764_TDM_CFG0_44_1_48KHZ;
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break;
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case 96000:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
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TAS2764_TDM_CFG0_88_2_96KHZ;
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break;
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case 88200:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
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TAS2764_TDM_CFG0_88_2_96KHZ;
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break;
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default:
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
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TAS2764_TDM_CFG0_SMP_MASK |
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TAS2764_TDM_CFG0_MASK,
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ramp_rate_val);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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ret = tas2764_set_bitwidth(tas2764, params_format(params));
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if (ret < 0)
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return ret;
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return tas2764_set_samplerate(tas2764, params_rate(params));
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}
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static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *component = dai->component;
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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u8 tdm_rx_start_slot = 0, asi_cfg_0 = 0, asi_cfg_1 = 0;
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int ret;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_IF:
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asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
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fallthrough;
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case SND_SOC_DAIFMT_NB_NF:
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asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
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fallthrough;
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case SND_SOC_DAIFMT_IB_NF:
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asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
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break;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
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TAS2764_TDM_CFG1_RX_MASK,
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asi_cfg_1);
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if (ret < 0)
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return ret;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
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fallthrough;
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case SND_SOC_DAIFMT_DSP_A:
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tdm_rx_start_slot = 1;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_LEFT_J:
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tdm_rx_start_slot = 0;
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break;
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default:
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dev_err(tas2764->dev,
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"DAI Format is not found, fmt=0x%x\n", fmt);
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
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TAS2764_TDM_CFG0_FRAME_START,
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asi_cfg_0);
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
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TAS2764_TDM_CFG1_MASK,
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(tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
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unsigned int tx_mask,
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unsigned int rx_mask,
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int slots, int slot_width)
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{
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struct snd_soc_component *component = dai->component;
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int left_slot, right_slot;
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int slots_cfg;
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int slot_size;
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int ret;
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if (tx_mask == 0 || rx_mask != 0)
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return -EINVAL;
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left_slot = __ffs(tx_mask);
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tx_mask &= ~(1 << left_slot);
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if (tx_mask == 0) {
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right_slot = left_slot;
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} else {
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right_slot = __ffs(tx_mask);
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tx_mask &= ~(1 << right_slot);
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}
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if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
|
|
return -EINVAL;
|
|
|
|
slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
|
|
|
|
ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
switch (slot_width) {
|
|
case 16:
|
|
slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
|
|
break;
|
|
case 24:
|
|
slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
|
|
break;
|
|
case 32:
|
|
slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
|
|
TAS2764_TDM_CFG2_RXS_MASK,
|
|
slot_size);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
|
|
TAS2764_TDM_CFG5_50_MASK,
|
|
tas2764->v_sense_slot);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
|
|
TAS2764_TDM_CFG6_50_MASK,
|
|
tas2764->i_sense_slot);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct snd_soc_dai_ops tas2764_dai_ops = {
|
|
.mute_stream = tas2764_mute,
|
|
.hw_params = tas2764_hw_params,
|
|
.set_fmt = tas2764_set_fmt,
|
|
.set_tdm_slot = tas2764_set_dai_tdm_slot,
|
|
.no_capture_mute = 1,
|
|
};
|
|
|
|
#define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
|
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
#define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
|
|
SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
|
|
|
|
static struct snd_soc_dai_driver tas2764_dai_driver[] = {
|
|
{
|
|
.name = "tas2764 ASI1",
|
|
.id = 0,
|
|
.playback = {
|
|
.stream_name = "ASI1 Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = TAS2764_RATES,
|
|
.formats = TAS2764_FORMATS,
|
|
},
|
|
.capture = {
|
|
.stream_name = "ASI1 Capture",
|
|
.channels_min = 0,
|
|
.channels_max = 2,
|
|
.rates = TAS2764_RATES,
|
|
.formats = TAS2764_FORMATS,
|
|
},
|
|
.ops = &tas2764_dai_ops,
|
|
.symmetric_rate = 1,
|
|
},
|
|
};
|
|
|
|
static int tas2764_codec_probe(struct snd_soc_component *component)
|
|
{
|
|
struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
|
|
int ret;
|
|
|
|
tas2764->component = component;
|
|
|
|
if (tas2764->sdz_gpio) {
|
|
gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
|
|
usleep_range(1000, 2000);
|
|
}
|
|
|
|
tas2764_reset(tas2764);
|
|
|
|
if (tas2764->irq) {
|
|
ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK0, 0xff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK1, 0xff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK2, 0xff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK3, 0xff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK4, 0xff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = devm_request_threaded_irq(tas2764->dev, tas2764->irq, NULL, tas2764_irq,
|
|
IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_LOW,
|
|
"tas2764", tas2764);
|
|
if (ret)
|
|
dev_warn(tas2764->dev, "failed to request IRQ: %d\n", ret);
|
|
}
|
|
|
|
ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
|
|
TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
|
|
TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
|
|
static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10050, 50, 1);
|
|
|
|
static const char * const tas2764_hpf_texts[] = {
|
|
"Disabled", "2 Hz", "50 Hz", "100 Hz", "200 Hz",
|
|
"400 Hz", "800 Hz"
|
|
};
|
|
|
|
static SOC_ENUM_SINGLE_DECL(
|
|
tas2764_hpf_enum, TAS2764_DC_BLK0,
|
|
TAS2764_DC_BLK0_HPF_FREQ_PB_SHIFT, tas2764_hpf_texts);
|
|
|
|
static const struct snd_kcontrol_new tas2764_snd_controls[] = {
|
|
SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
|
|
TAS2764_DVC_MAX, 1, tas2764_playback_volume),
|
|
SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 1, 0x14, 0,
|
|
tas2764_digital_tlv),
|
|
SOC_ENUM("HPF Corner Frequency", tas2764_hpf_enum),
|
|
};
|
|
|
|
static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
|
|
.probe = tas2764_codec_probe,
|
|
.suspend = tas2764_codec_suspend,
|
|
.resume = tas2764_codec_resume,
|
|
.controls = tas2764_snd_controls,
|
|
.num_controls = ARRAY_SIZE(tas2764_snd_controls),
|
|
.dapm_widgets = tas2764_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(tas2764_dapm_widgets),
|
|
.dapm_routes = tas2764_audio_map,
|
|
.num_dapm_routes = ARRAY_SIZE(tas2764_audio_map),
|
|
.idle_bias_on = 1,
|
|
.endianness = 1,
|
|
};
|
|
|
|
static const struct reg_default tas2764_reg_defaults[] = {
|
|
{ TAS2764_PAGE, 0x00 },
|
|
{ TAS2764_SW_RST, 0x00 },
|
|
{ TAS2764_PWR_CTRL, 0x1a },
|
|
{ TAS2764_DVC, 0x00 },
|
|
{ TAS2764_CHNL_0, 0x28 },
|
|
{ TAS2764_TDM_CFG0, 0x09 },
|
|
{ TAS2764_TDM_CFG1, 0x02 },
|
|
{ TAS2764_TDM_CFG2, 0x0a },
|
|
{ TAS2764_TDM_CFG3, 0x10 },
|
|
{ TAS2764_TDM_CFG5, 0x42 },
|
|
};
|
|
|
|
static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
|
|
{
|
|
.range_min = 0,
|
|
.range_max = 1 * 128,
|
|
.selector_reg = TAS2764_PAGE,
|
|
.selector_mask = 0xff,
|
|
.selector_shift = 0,
|
|
.window_start = 0,
|
|
.window_len = 128,
|
|
},
|
|
};
|
|
|
|
static bool tas2764_volatile_register(struct device *dev, unsigned int reg)
|
|
{
|
|
switch (reg) {
|
|
case TAS2764_INT_LTCH0 ... TAS2764_INT_LTCH4:
|
|
case TAS2764_INT_CLK_CFG:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static const struct regmap_config tas2764_i2c_regmap = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
.volatile_reg = tas2764_volatile_register,
|
|
.reg_defaults = tas2764_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
|
|
.cache_type = REGCACHE_RBTREE,
|
|
.ranges = tas2764_regmap_ranges,
|
|
.num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
|
|
.max_register = 1 * 128,
|
|
};
|
|
|
|
static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
|
|
{
|
|
int ret = 0;
|
|
|
|
tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
|
|
GPIOD_OUT_HIGH);
|
|
if (IS_ERR(tas2764->reset_gpio)) {
|
|
if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
|
|
tas2764->reset_gpio = NULL;
|
|
return -EPROBE_DEFER;
|
|
}
|
|
}
|
|
|
|
tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(tas2764->sdz_gpio)) {
|
|
if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
|
|
return -EPROBE_DEFER;
|
|
|
|
tas2764->sdz_gpio = NULL;
|
|
}
|
|
|
|
ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
|
|
&tas2764->i_sense_slot);
|
|
if (ret)
|
|
tas2764->i_sense_slot = 0;
|
|
|
|
ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
|
|
&tas2764->v_sense_slot);
|
|
if (ret)
|
|
tas2764->v_sense_slot = 2;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tas2764_i2c_probe(struct i2c_client *client)
|
|
{
|
|
struct tas2764_priv *tas2764;
|
|
int result;
|
|
|
|
tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
|
|
GFP_KERNEL);
|
|
if (!tas2764)
|
|
return -ENOMEM;
|
|
|
|
tas2764->dev = &client->dev;
|
|
tas2764->irq = client->irq;
|
|
i2c_set_clientdata(client, tas2764);
|
|
dev_set_drvdata(&client->dev, tas2764);
|
|
|
|
tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
|
|
if (IS_ERR(tas2764->regmap)) {
|
|
result = PTR_ERR(tas2764->regmap);
|
|
dev_err(&client->dev, "Failed to allocate register map: %d\n",
|
|
result);
|
|
return result;
|
|
}
|
|
|
|
if (client->dev.of_node) {
|
|
result = tas2764_parse_dt(&client->dev, tas2764);
|
|
if (result) {
|
|
dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
|
|
__func__);
|
|
return result;
|
|
}
|
|
}
|
|
|
|
return devm_snd_soc_register_component(tas2764->dev,
|
|
&soc_component_driver_tas2764,
|
|
tas2764_dai_driver,
|
|
ARRAY_SIZE(tas2764_dai_driver));
|
|
}
|
|
|
|
static const struct i2c_device_id tas2764_i2c_id[] = {
|
|
{ "tas2764", 0},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
|
|
|
|
#if defined(CONFIG_OF)
|
|
static const struct of_device_id tas2764_of_match[] = {
|
|
{ .compatible = "ti,tas2764" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, tas2764_of_match);
|
|
#endif
|
|
|
|
static struct i2c_driver tas2764_i2c_driver = {
|
|
.driver = {
|
|
.name = "tas2764",
|
|
.of_match_table = of_match_ptr(tas2764_of_match),
|
|
},
|
|
.probe_new = tas2764_i2c_probe,
|
|
.id_table = tas2764_i2c_id,
|
|
};
|
|
module_i2c_driver(tas2764_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
|
|
MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
|
|
MODULE_LICENSE("GPL v2");
|