mirror of
https://github.com/torvalds/linux.git
synced 2024-12-28 05:41:55 +00:00
bb8e370bdc
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
Committer tests:
Test built on a ubuntu 18.04 container with a cross build environment to
arm64, the new field is there, need to find a machine with this feature
to do further testing in the future.
root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_CATU=y
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SINK_ETBV10=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CPU_DEBUG=m
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o
.../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o
struct coresight_device {
struct coresight_connection * conns; /* 0 8 */
int nr_inport; /* 8 4 */
int nr_outport; /* 12 4 */
enum coresight_dev_type type; /* 16 4 */
union coresight_dev_subtype subtype; /* 20 8 */
/* XXX 4 bytes hole, try to pack */
const struct coresight_ops * ops; /* 32 8 */
struct device dev; /* 40 1408 */
/* XXX last struct has 7 bytes of padding */
/* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */
atomic_t * refcnt; /* 1448 8 */
bool orphan; /* 1456 1 */
bool enable; /* 1457 1 */
bool activated; /* 1458 1 */
/* XXX 5 bytes hole, try to pack */
struct dev_ext_attribute * ea; /* 1464 8 */
/* size: 1472, cachelines: 23, members: 12 */
/* sum members: 1463, holes: 2, sum holes: 9 */
/* paddings: 1, sum paddings: 7 */
};
root@d15263e5734a:/git/perf#
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
86 lines
2.3 KiB
C
86 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright(C) 2015 Linaro Limited. All rights reserved.
|
|
* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
*/
|
|
|
|
#ifndef _CORESIGHT_ETM_PERF_H
|
|
#define _CORESIGHT_ETM_PERF_H
|
|
|
|
#include <linux/percpu-defs.h>
|
|
#include "coresight-priv.h"
|
|
|
|
struct coresight_device;
|
|
|
|
/*
|
|
* In both ETMv3 and v4 the maximum number of address comparator implentable
|
|
* is 8. The actual number is implementation specific and will be checked
|
|
* when filters are applied.
|
|
*/
|
|
#define ETM_ADDR_CMP_MAX 8
|
|
|
|
/**
|
|
* struct etm_filter - single instruction range or start/stop configuration.
|
|
* @start_addr: The address to start tracing on.
|
|
* @stop_addr: The address to stop tracing on.
|
|
* @type: Is this a range or start/stop filter.
|
|
*/
|
|
struct etm_filter {
|
|
unsigned long start_addr;
|
|
unsigned long stop_addr;
|
|
enum etm_addr_type type;
|
|
};
|
|
|
|
/**
|
|
* struct etm_filters - set of filters for a session
|
|
* @etm_filter: All the filters for this session.
|
|
* @nr_filters: Number of filters
|
|
* @ssstatus: Status of the start/stop logic.
|
|
*/
|
|
struct etm_filters {
|
|
struct etm_filter etm_filter[ETM_ADDR_CMP_MAX];
|
|
unsigned int nr_filters;
|
|
bool ssstatus;
|
|
};
|
|
|
|
/**
|
|
* struct etm_event_data - Coresight specifics associated to an event
|
|
* @work: Handle to free allocated memory outside IRQ context.
|
|
* @mask: Hold the CPU(s) this event was set for.
|
|
* @snk_config: The sink configuration.
|
|
* @path: An array of path, each slot for one CPU.
|
|
*/
|
|
struct etm_event_data {
|
|
struct work_struct work;
|
|
cpumask_t mask;
|
|
void *snk_config;
|
|
struct list_head * __percpu *path;
|
|
};
|
|
|
|
#ifdef CONFIG_CORESIGHT
|
|
int etm_perf_symlink(struct coresight_device *csdev, bool link);
|
|
int etm_perf_add_symlink_sink(struct coresight_device *csdev);
|
|
void etm_perf_del_symlink_sink(struct coresight_device *csdev);
|
|
static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
|
|
{
|
|
struct etm_event_data *data = perf_get_aux(handle);
|
|
|
|
if (data)
|
|
return data->snk_config;
|
|
return NULL;
|
|
}
|
|
#else
|
|
static inline int etm_perf_symlink(struct coresight_device *csdev, bool link)
|
|
{ return -EINVAL; }
|
|
int etm_perf_add_symlink_sink(struct coresight_device *csdev)
|
|
{ return -EINVAL; }
|
|
void etm_perf_del_symlink_sink(struct coresight_device *csdev) {}
|
|
static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
#endif /* CONFIG_CORESIGHT */
|
|
|
|
#endif
|