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64e22b8685
Pull libata updates from Tejun Heo: - a number of libata core changes to better support NCQ TRIM. - ahci now supports MSI-X in single IRQ mode to support a new controller which doesn't implement MSI or INTX. - ahci now supports edge-triggered IRQ mode to support a new controller which for some odd reason did edge-triggered IRQ. - the usual controller support additions and changes. * 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (27 commits) libata: Do not blacklist Micron M500DC ata: ahci_mvebu: add suspend/resume support ahci, msix: Fix build error for !PCI_MSI ahci: Add support for Cavium's ThunderX host controller ahci: Add generic MSI-X support for single interrupts to SATA PCI driver libata: finally use __initconst in ata_parse_force_one() drivers: ata: add support for Ceva sata host controller devicetree:bindings: add devicetree bindings for ceva ahci ahci: added support for Freescale AHCI sata ahci: Store irq number in struct ahci_host_priv ahci: Move interrupt enablement code to a separate function Doc: libata: Fix spelling typo found in libata.xml ata:sata_nv - Change 1 to true for bool type variable. ata: add Broadcom AHCI SATA3 driver for STB chips Documentation: devicetree: add Broadcom SATA binding libata: Fix regression when the NCQ Send and Receive log page is absent ata: hpt366: fix constant cast warning ata: ahci_xgene: potential NULL dereference in probe ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller. libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch. ...
156 lines
4.0 KiB
C
156 lines
4.0 KiB
C
/*
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* AHCI glue platform driver for Marvell EBU SOCs
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*
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* Copyright (C) 2014 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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* Marcin Wojtas <mw@semihalf.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/ahci_platform.h>
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#include <linux/kernel.h>
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#include <linux/mbus.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "ahci.h"
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#define DRV_NAME "ahci-mvebu"
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#define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0
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#define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4
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#define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4))
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#define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4))
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#define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4))
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static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
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const struct mbus_dram_target_info *dram)
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{
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int i;
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for (i = 0; i < 4; i++) {
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writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
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writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
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writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
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}
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for (i = 0; i < dram->num_cs; i++) {
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const struct mbus_dram_window *cs = dram->cs + i;
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writel((cs->mbus_attr << 8) |
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(dram->mbus_dram_target_id << 4) | 1,
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hpriv->mmio + AHCI_WINDOW_CTRL(i));
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writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
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writel(((cs->size - 1) & 0xffff0000),
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hpriv->mmio + AHCI_WINDOW_SIZE(i));
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}
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}
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static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
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{
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/*
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* Enable the regret bit to allow the SATA unit to regret a
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* request that didn't receive an acknowlegde and avoid a
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* deadlock
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*/
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writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
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writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
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}
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static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
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{
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return ahci_platform_suspend_host(&pdev->dev);
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}
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static int ahci_mvebu_resume(struct platform_device *pdev)
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{
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struct ata_host *host = platform_get_drvdata(pdev);
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struct ahci_host_priv *hpriv = host->private_data;
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const struct mbus_dram_target_info *dram;
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dram = mv_mbus_dram_info();
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if (dram)
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ahci_mvebu_mbus_config(hpriv, dram);
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ahci_mvebu_regret_option(hpriv);
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return ahci_platform_resume_host(&pdev->dev);
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}
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static const struct ata_port_info ahci_mvebu_port_info = {
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_platform_ops,
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};
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static struct scsi_host_template ahci_platform_sht = {
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AHCI_SHT(DRV_NAME),
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};
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static int ahci_mvebu_probe(struct platform_device *pdev)
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{
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struct ahci_host_priv *hpriv;
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const struct mbus_dram_target_info *dram;
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int rc;
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hpriv = ahci_platform_get_resources(pdev);
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if (IS_ERR(hpriv))
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return PTR_ERR(hpriv);
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rc = ahci_platform_enable_resources(hpriv);
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if (rc)
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return rc;
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dram = mv_mbus_dram_info();
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if (!dram)
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return -ENODEV;
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ahci_mvebu_mbus_config(hpriv, dram);
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ahci_mvebu_regret_option(hpriv);
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rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
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&ahci_platform_sht);
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if (rc)
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goto disable_resources;
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return 0;
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disable_resources:
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ahci_platform_disable_resources(hpriv);
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return rc;
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}
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static const struct of_device_id ahci_mvebu_of_match[] = {
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{ .compatible = "marvell,armada-380-ahci", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
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/*
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* We currently don't provide power management related operations,
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* since there is no suspend/resume support at the platform level for
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* Armada 38x for the moment.
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*/
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static struct platform_driver ahci_mvebu_driver = {
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.probe = ahci_mvebu_probe,
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.remove = ata_platform_remove_one,
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.suspend = ahci_mvebu_suspend,
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.resume = ahci_mvebu_resume,
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.driver = {
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.name = DRV_NAME,
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.of_match_table = ahci_mvebu_of_match,
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},
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};
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module_platform_driver(ahci_mvebu_driver);
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MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
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MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:ahci_mvebu");
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