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A100 features an updated DPHY, which moves PLL control inside the DPHY register space (previously the PLL was controlled from the CCU). It also requires a modified analog power-on sequence. This "combo PHY" can also be used as an LVDS PHY, but that is not yet supported by the driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20221114022113.31694-9-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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Kconfig | ||
Makefile | ||
phy-sun4i-usb.c | ||
phy-sun6i-mipi-dphy.c | ||
phy-sun9i-usb.c | ||
phy-sun50i-usb3.c |