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Based on 1 normalized pattern(s): licensed under the terms of the gnu gpl license version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 62 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.929121379@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
426 lines
11 KiB
C
426 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on documentation provided by Dave Jones. Thanks!
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*
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* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/timex.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <asm/cpu_device_id.h>
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#include <asm/msr.h>
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#include <asm/tsc.h>
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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#include <linux/acpi.h>
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#include <acpi/processor.h>
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#endif
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#define EPS_BRAND_C7M 0
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#define EPS_BRAND_C7 1
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#define EPS_BRAND_EDEN 2
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#define EPS_BRAND_C3 3
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#define EPS_BRAND_C7D 4
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struct eps_cpu_data {
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u32 fsb;
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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u32 bios_limit;
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#endif
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struct cpufreq_frequency_table freq_table[];
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};
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static struct eps_cpu_data *eps_cpu[NR_CPUS];
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/* Module parameters */
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static int freq_failsafe_off;
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static int voltage_failsafe_off;
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static int set_max_voltage;
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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static int ignore_acpi_limit;
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static struct acpi_processor_performance *eps_acpi_cpu_perf;
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/* Minimum necessary to get acpi_processor_get_bios_limit() working */
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static int eps_acpi_init(void)
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{
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eps_acpi_cpu_perf = kzalloc(sizeof(*eps_acpi_cpu_perf),
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GFP_KERNEL);
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if (!eps_acpi_cpu_perf)
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return -ENOMEM;
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if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
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GFP_KERNEL)) {
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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return -ENOMEM;
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}
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if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
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free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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return -EIO;
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}
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return 0;
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}
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static int eps_acpi_exit(struct cpufreq_policy *policy)
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{
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if (eps_acpi_cpu_perf) {
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acpi_processor_unregister_performance(0);
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free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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}
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return 0;
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}
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#endif
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static unsigned int eps_get(unsigned int cpu)
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{
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struct eps_cpu_data *centaur;
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u32 lo, hi;
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if (cpu)
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return 0;
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centaur = eps_cpu[cpu];
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if (centaur == NULL)
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return 0;
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/* Return current frequency */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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return centaur->fsb * ((lo >> 8) & 0xff);
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}
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static int eps_set_state(struct eps_cpu_data *centaur,
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struct cpufreq_policy *policy,
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u32 dest_state)
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{
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u32 lo, hi;
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int i;
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/* Wait while CPU is busy */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i = 0;
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while (lo & ((1 << 16) | (1 << 17))) {
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udelay(16);
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i++;
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if (unlikely(i > 64)) {
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return -ENODEV;
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}
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}
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/* Set new multiplier and voltage */
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wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
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/* Wait until transition end */
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i = 0;
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do {
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udelay(16);
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i++;
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if (unlikely(i > 64)) {
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return -ENODEV;
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}
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} while (lo & ((1 << 16) | (1 << 17)));
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#ifdef DEBUG
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{
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u8 current_multiplier, current_voltage;
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/* Print voltage and multiplier */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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current_voltage = lo & 0xff;
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pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
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current_multiplier = (lo >> 8) & 0xff;
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pr_info("Current multiplier = %d\n", current_multiplier);
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}
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#endif
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return 0;
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}
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static int eps_target(struct cpufreq_policy *policy, unsigned int index)
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{
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struct eps_cpu_data *centaur;
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unsigned int cpu = policy->cpu;
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unsigned int dest_state;
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int ret;
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if (unlikely(eps_cpu[cpu] == NULL))
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return -ENODEV;
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centaur = eps_cpu[cpu];
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/* Make frequency transition */
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dest_state = centaur->freq_table[index].driver_data & 0xffff;
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ret = eps_set_state(centaur, policy, dest_state);
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if (ret)
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pr_err("Timeout!\n");
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return ret;
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}
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static int eps_cpu_init(struct cpufreq_policy *policy)
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{
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unsigned int i;
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u32 lo, hi;
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u64 val;
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u8 current_multiplier, current_voltage;
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u8 max_multiplier, max_voltage;
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u8 min_multiplier, min_voltage;
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u8 brand = 0;
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u32 fsb;
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struct eps_cpu_data *centaur;
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struct cpuinfo_x86 *c = &cpu_data(0);
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struct cpufreq_frequency_table *f_table;
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int k, step, voltage;
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int states;
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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unsigned int limit;
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#endif
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if (policy->cpu != 0)
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return -ENODEV;
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/* Check brand */
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pr_info("Detected VIA ");
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switch (c->x86_model) {
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case 10:
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rdmsr(0x1153, lo, hi);
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brand = (((lo >> 2) ^ lo) >> 18) & 3;
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pr_cont("Model A ");
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break;
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case 13:
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rdmsr(0x1154, lo, hi);
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brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
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pr_cont("Model D ");
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break;
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}
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switch (brand) {
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case EPS_BRAND_C7M:
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pr_cont("C7-M\n");
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break;
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case EPS_BRAND_C7:
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pr_cont("C7\n");
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break;
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case EPS_BRAND_EDEN:
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pr_cont("Eden\n");
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break;
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case EPS_BRAND_C7D:
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pr_cont("C7-D\n");
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break;
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case EPS_BRAND_C3:
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pr_cont("C3\n");
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return -ENODEV;
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break;
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}
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/* Enable Enhanced PowerSaver */
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rdmsrl(MSR_IA32_MISC_ENABLE, val);
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if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
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wrmsrl(MSR_IA32_MISC_ENABLE, val);
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/* Can be locked at 0 */
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rdmsrl(MSR_IA32_MISC_ENABLE, val);
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if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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pr_info("Can't enable Enhanced PowerSaver\n");
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return -ENODEV;
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}
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}
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/* Print voltage and multiplier */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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current_voltage = lo & 0xff;
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pr_info("Current voltage = %dmV\n", current_voltage * 16 + 700);
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current_multiplier = (lo >> 8) & 0xff;
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pr_info("Current multiplier = %d\n", current_multiplier);
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/* Print limits */
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max_voltage = hi & 0xff;
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pr_info("Highest voltage = %dmV\n", max_voltage * 16 + 700);
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max_multiplier = (hi >> 8) & 0xff;
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pr_info("Highest multiplier = %d\n", max_multiplier);
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min_voltage = (hi >> 16) & 0xff;
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pr_info("Lowest voltage = %dmV\n", min_voltage * 16 + 700);
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min_multiplier = (hi >> 24) & 0xff;
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pr_info("Lowest multiplier = %d\n", min_multiplier);
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/* Sanity checks */
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if (current_multiplier == 0 || max_multiplier == 0
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|| min_multiplier == 0)
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return -EINVAL;
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if (current_multiplier > max_multiplier
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|| max_multiplier <= min_multiplier)
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return -EINVAL;
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if (current_voltage > 0x1f || max_voltage > 0x1f)
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return -EINVAL;
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if (max_voltage < min_voltage
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|| current_voltage < min_voltage
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|| current_voltage > max_voltage)
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return -EINVAL;
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/* Check for systems using underclocked CPU */
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if (!freq_failsafe_off && max_multiplier != current_multiplier) {
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pr_info("Your processor is running at different frequency then its maximum. Aborting.\n");
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pr_info("You can use freq_failsafe_off option to disable this check.\n");
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return -EINVAL;
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}
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if (!voltage_failsafe_off && max_voltage != current_voltage) {
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pr_info("Your processor is running at different voltage then its maximum. Aborting.\n");
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pr_info("You can use voltage_failsafe_off option to disable this check.\n");
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return -EINVAL;
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}
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/* Calc FSB speed */
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fsb = cpu_khz / current_multiplier;
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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/* Check for ACPI processor speed limit */
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if (!ignore_acpi_limit && !eps_acpi_init()) {
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if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
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pr_info("ACPI limit %u.%uGHz\n",
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limit/1000000,
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(limit%1000000)/10000);
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eps_acpi_exit(policy);
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/* Check if max_multiplier is in BIOS limits */
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if (limit && max_multiplier * fsb > limit) {
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pr_info("Aborting\n");
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return -EINVAL;
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}
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}
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}
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#endif
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/* Allow user to set lower maximum voltage then that reported
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* by processor */
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if (brand == EPS_BRAND_C7M && set_max_voltage) {
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u32 v;
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/* Change mV to something hardware can use */
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v = (set_max_voltage - 700) / 16;
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/* Check if voltage is within limits */
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if (v >= min_voltage && v <= max_voltage) {
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pr_info("Setting %dmV as maximum\n", v * 16 + 700);
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max_voltage = v;
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}
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}
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/* Calc number of p-states supported */
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if (brand == EPS_BRAND_C7M)
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states = max_multiplier - min_multiplier + 1;
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else
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states = 2;
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/* Allocate private data and frequency table for current cpu */
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centaur = kzalloc(struct_size(centaur, freq_table, states + 1),
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GFP_KERNEL);
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if (!centaur)
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return -ENOMEM;
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eps_cpu[0] = centaur;
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/* Copy basic values */
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centaur->fsb = fsb;
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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centaur->bios_limit = limit;
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#endif
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/* Fill frequency and MSR value table */
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f_table = ¢aur->freq_table[0];
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if (brand != EPS_BRAND_C7M) {
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f_table[0].frequency = fsb * min_multiplier;
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f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
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f_table[1].frequency = fsb * max_multiplier;
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f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
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f_table[2].frequency = CPUFREQ_TABLE_END;
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} else {
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k = 0;
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step = ((max_voltage - min_voltage) * 256)
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/ (max_multiplier - min_multiplier);
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for (i = min_multiplier; i <= max_multiplier; i++) {
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voltage = (k * step) / 256 + min_voltage;
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f_table[k].frequency = fsb * i;
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f_table[k].driver_data = (i << 8) | voltage;
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k++;
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}
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f_table[k].frequency = CPUFREQ_TABLE_END;
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}
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policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
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policy->freq_table = ¢aur->freq_table[0];
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return 0;
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}
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static int eps_cpu_exit(struct cpufreq_policy *policy)
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{
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unsigned int cpu = policy->cpu;
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/* Bye */
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kfree(eps_cpu[cpu]);
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eps_cpu[cpu] = NULL;
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return 0;
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}
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static struct cpufreq_driver eps_driver = {
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = eps_target,
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.init = eps_cpu_init,
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.exit = eps_cpu_exit,
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.get = eps_get,
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.name = "e_powersaver",
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.attr = cpufreq_generic_attr,
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};
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/* This driver will work only on Centaur C7 processors with
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* Enhanced SpeedStep/PowerSaver registers */
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static const struct x86_cpu_id eps_cpu_id[] = {
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{ X86_VENDOR_CENTAUR, 6, X86_MODEL_ANY, X86_FEATURE_EST },
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);
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static int __init eps_init(void)
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{
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if (!x86_match_cpu(eps_cpu_id) || boot_cpu_data.x86_model < 10)
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return -ENODEV;
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if (cpufreq_register_driver(&eps_driver))
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return -EINVAL;
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return 0;
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}
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static void __exit eps_exit(void)
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{
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cpufreq_unregister_driver(&eps_driver);
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}
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/* Allow user to overclock his machine or to change frequency to higher after
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* unloading module */
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module_param(freq_failsafe_off, int, 0644);
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MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
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module_param(voltage_failsafe_off, int, 0644);
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MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
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#if IS_ENABLED(CONFIG_ACPI_PROCESSOR)
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module_param(ignore_acpi_limit, int, 0644);
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MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
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#endif
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module_param(set_max_voltage, int, 0644);
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MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
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MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
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MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
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MODULE_LICENSE("GPL");
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module_init(eps_init);
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module_exit(eps_exit);
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