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da24b8240f
This patch supports xgene-slimpro-i2c v2 which uses the non-cachable memory as the PCC shared memory. Signed-off-by: Hoan Tran <hotran@apm.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
628 lines
17 KiB
C
628 lines
17 KiB
C
/*
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* X-Gene SLIMpro I2C Driver
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*
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* Copyright (c) 2014, Applied Micro Circuits Corporation
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* Author: Feng Kan <fkan@apm.com>
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* Author: Hieu Le <hnle@apm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* This driver provides support for X-Gene SLIMpro I2C device access
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* using the APM X-Gene SLIMpro mailbox driver.
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*
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*/
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#include <acpi/pcc.h>
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#include <linux/acpi.h>
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#include <linux/dma-mapping.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mailbox_client.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/version.h>
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#define MAILBOX_OP_TIMEOUT 1000 /* Operation time out in ms */
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#define MAILBOX_I2C_INDEX 0
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#define SLIMPRO_IIC_BUS 1 /* Use I2C bus 1 only */
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#define SMBUS_CMD_LEN 1
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#define BYTE_DATA 1
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#define WORD_DATA 2
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#define BLOCK_DATA 3
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#define SLIMPRO_IIC_I2C_PROTOCOL 0
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#define SLIMPRO_IIC_SMB_PROTOCOL 1
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#define SLIMPRO_IIC_READ 0
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#define SLIMPRO_IIC_WRITE 1
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#define IIC_SMB_WITHOUT_DATA_LEN 0
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#define IIC_SMB_WITH_DATA_LEN 1
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#define SLIMPRO_DEBUG_MSG 0
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#define SLIMPRO_MSG_TYPE_SHIFT 28
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#define SLIMPRO_DBG_SUBTYPE_I2C1READ 4
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#define SLIMPRO_DBGMSG_TYPE_SHIFT 24
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#define SLIMPRO_DBGMSG_TYPE_MASK 0x0F000000U
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#define SLIMPRO_IIC_DEV_SHIFT 23
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#define SLIMPRO_IIC_DEV_MASK 0x00800000U
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#define SLIMPRO_IIC_DEVID_SHIFT 13
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#define SLIMPRO_IIC_DEVID_MASK 0x007FE000U
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#define SLIMPRO_IIC_RW_SHIFT 12
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#define SLIMPRO_IIC_RW_MASK 0x00001000U
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#define SLIMPRO_IIC_PROTO_SHIFT 11
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#define SLIMPRO_IIC_PROTO_MASK 0x00000800U
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#define SLIMPRO_IIC_ADDRLEN_SHIFT 8
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#define SLIMPRO_IIC_ADDRLEN_MASK 0x00000700U
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#define SLIMPRO_IIC_DATALEN_SHIFT 0
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#define SLIMPRO_IIC_DATALEN_MASK 0x000000FFU
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/*
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* SLIMpro I2C message encode
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*
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* dev - Controller number (0-based)
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* chip - I2C chip address
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* op - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
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* proto - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
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* addrlen - Length of the address field
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* datalen - Length of the data field
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*/
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#define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
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((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
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((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
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SLIMPRO_DBGMSG_TYPE_MASK) | \
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((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
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((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
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((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
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((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
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((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
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((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
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#define SLIMPRO_MSG_TYPE(v) (((v) & 0xF0000000) >> 28)
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/*
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* Encode for upper address for block data
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*/
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#define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR 0x80000000
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#define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a) ((u32) (((a) << 30) \
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& 0x40000000))
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#define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a) ((u32) (((a) >> 12) \
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& 0x3FF00000))
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#define SLIMPRO_IIC_ENCODE_ADDR(a) ((a) & 0x000FFFFF)
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#define SLIMPRO_IIC_MSG_DWORD_COUNT 3
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/* PCC related defines */
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#define PCC_SIGNATURE 0x50424300
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#define PCC_STS_CMD_COMPLETE BIT(0)
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#define PCC_STS_SCI_DOORBELL BIT(1)
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#define PCC_STS_ERR BIT(2)
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#define PCC_STS_PLAT_NOTIFY BIT(3)
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#define PCC_CMD_GENERATE_DB_INT BIT(15)
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struct slimpro_i2c_dev {
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struct i2c_adapter adapter;
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struct device *dev;
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struct mbox_chan *mbox_chan;
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struct mbox_client mbox_client;
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int mbox_idx;
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struct completion rd_complete;
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u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
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u32 *resp_msg;
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phys_addr_t comm_base_addr;
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void *pcc_comm_addr;
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};
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#define to_slimpro_i2c_dev(cl) \
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container_of(cl, struct slimpro_i2c_dev, mbox_client)
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enum slimpro_i2c_version {
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XGENE_SLIMPRO_I2C_V1 = 0,
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XGENE_SLIMPRO_I2C_V2 = 1,
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};
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/*
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* This function tests and clears a bitmask then returns its old value
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*/
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static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
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{
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u16 ret, val;
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val = le16_to_cpu(READ_ONCE(*addr));
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ret = val & mask;
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val &= ~mask;
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WRITE_ONCE(*addr, cpu_to_le16(val));
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return ret;
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}
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static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
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{
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struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
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/*
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* Response message format:
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* mssg[0] is the return code of the operation
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* mssg[1] is the first data word
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* mssg[2] is NOT used
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*/
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if (ctx->resp_msg)
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*ctx->resp_msg = ((u32 *)mssg)[1];
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if (ctx->mbox_client.tx_block)
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complete(&ctx->rd_complete);
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}
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static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
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{
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struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
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struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
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/* Check if platform sends interrupt */
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if (!xgene_word_tst_and_clr(&generic_comm_base->status,
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PCC_STS_SCI_DOORBELL))
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return;
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if (xgene_word_tst_and_clr(&generic_comm_base->status,
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PCC_STS_CMD_COMPLETE)) {
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msg = generic_comm_base + 1;
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/* Response message msg[1] contains the return value. */
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if (ctx->resp_msg)
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*ctx->resp_msg = ((u32 *)msg)[1];
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complete(&ctx->rd_complete);
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}
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}
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static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
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{
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struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
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u32 *ptr = (void *)(generic_comm_base + 1);
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u16 status;
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int i;
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WRITE_ONCE(generic_comm_base->signature,
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cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));
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WRITE_ONCE(generic_comm_base->command,
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cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));
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status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
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status &= ~PCC_STS_CMD_COMPLETE;
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WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
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/* Copy the message to the PCC comm space */
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for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
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WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
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}
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static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
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{
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if (ctx->mbox_client.tx_block || !acpi_disabled) {
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if (!wait_for_completion_timeout(&ctx->rd_complete,
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msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
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return -ETIMEDOUT;
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}
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/* Check of invalid data or no device */
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if (*ctx->resp_msg == 0xffffffff)
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return -ENODEV;
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return 0;
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}
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static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
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u32 *msg,
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u32 *data)
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{
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int rc;
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ctx->resp_msg = data;
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if (!acpi_disabled) {
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reinit_completion(&ctx->rd_complete);
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slimpro_i2c_pcc_tx_prepare(ctx, msg);
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}
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rc = mbox_send_message(ctx->mbox_chan, msg);
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if (rc < 0)
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goto err;
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rc = start_i2c_msg_xfer(ctx);
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err:
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if (!acpi_disabled)
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mbox_chan_txdone(ctx->mbox_chan, 0);
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ctx->resp_msg = NULL;
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return rc;
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}
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static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
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u32 addr, u32 addrlen, u32 protocol,
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u32 readlen, u32 *data)
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{
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u32 msg[3];
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msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
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SLIMPRO_IIC_READ, protocol, addrlen, readlen);
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msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
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msg[2] = 0;
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return slimpro_i2c_send_msg(ctx, msg, data);
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}
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static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
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u32 addr, u32 addrlen, u32 protocol, u32 writelen,
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u32 data)
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{
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u32 msg[3];
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msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
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SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
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msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
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msg[2] = data;
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return slimpro_i2c_send_msg(ctx, msg, msg);
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}
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static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
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u32 addrlen, u32 protocol, u32 readlen,
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u32 with_data_len, void *data)
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{
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dma_addr_t paddr;
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u32 msg[3];
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int rc;
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paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
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if (dma_mapping_error(ctx->dev, paddr)) {
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dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
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ctx->dma_buffer);
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return -ENOMEM;
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}
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msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
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protocol, addrlen, readlen);
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msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
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SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
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SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
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SLIMPRO_IIC_ENCODE_ADDR(addr);
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msg[2] = (u32)paddr;
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rc = slimpro_i2c_send_msg(ctx, msg, msg);
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/* Copy to destination */
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memcpy(data, ctx->dma_buffer, readlen);
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dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
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return rc;
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}
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static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
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u32 addr, u32 addrlen, u32 protocol, u32 writelen,
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void *data)
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{
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dma_addr_t paddr;
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u32 msg[3];
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int rc;
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memcpy(ctx->dma_buffer, data, writelen);
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paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
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DMA_TO_DEVICE);
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if (dma_mapping_error(ctx->dev, paddr)) {
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dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
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ctx->dma_buffer);
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return -ENOMEM;
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}
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msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
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protocol, addrlen, writelen);
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msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
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SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
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SLIMPRO_IIC_ENCODE_ADDR(addr);
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msg[2] = (u32)paddr;
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if (ctx->mbox_client.tx_block)
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reinit_completion(&ctx->rd_complete);
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rc = slimpro_i2c_send_msg(ctx, msg, msg);
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dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
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return rc;
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}
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static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size,
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union i2c_smbus_data *data)
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{
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struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
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int ret = -EOPNOTSUPP;
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u32 val;
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switch (size) {
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case I2C_SMBUS_BYTE:
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if (read_write == I2C_SMBUS_READ) {
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ret = slimpro_i2c_rd(ctx, addr, 0, 0,
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SLIMPRO_IIC_SMB_PROTOCOL,
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BYTE_DATA, &val);
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data->byte = val;
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} else {
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ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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0, 0);
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}
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break;
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case I2C_SMBUS_BYTE_DATA:
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if (read_write == I2C_SMBUS_READ) {
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ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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BYTE_DATA, &val);
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data->byte = val;
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} else {
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val = data->byte;
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ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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BYTE_DATA, val);
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}
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break;
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case I2C_SMBUS_WORD_DATA:
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if (read_write == I2C_SMBUS_READ) {
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ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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WORD_DATA, &val);
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data->word = val;
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} else {
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val = data->word;
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ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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WORD_DATA, val);
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}
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break;
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case I2C_SMBUS_BLOCK_DATA:
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if (read_write == I2C_SMBUS_READ) {
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ret = slimpro_i2c_blkrd(ctx, addr, command,
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SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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I2C_SMBUS_BLOCK_MAX + 1,
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IIC_SMB_WITH_DATA_LEN,
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&data->block[0]);
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} else {
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ret = slimpro_i2c_blkwr(ctx, addr, command,
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SMBUS_CMD_LEN,
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SLIMPRO_IIC_SMB_PROTOCOL,
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data->block[0] + 1,
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&data->block[0]);
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}
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break;
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case I2C_SMBUS_I2C_BLOCK_DATA:
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if (read_write == I2C_SMBUS_READ) {
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ret = slimpro_i2c_blkrd(ctx, addr,
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command,
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SMBUS_CMD_LEN,
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SLIMPRO_IIC_I2C_PROTOCOL,
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I2C_SMBUS_BLOCK_MAX,
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IIC_SMB_WITHOUT_DATA_LEN,
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&data->block[1]);
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} else {
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ret = slimpro_i2c_blkwr(ctx, addr, command,
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SMBUS_CMD_LEN,
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SLIMPRO_IIC_I2C_PROTOCOL,
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data->block[0],
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&data->block[1]);
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}
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break;
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default:
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break;
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}
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return ret;
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}
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/*
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* Return list of supported functionality.
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*/
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static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_BLOCK_DATA |
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I2C_FUNC_SMBUS_I2C_BLOCK;
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}
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static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
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.smbus_xfer = xgene_slimpro_i2c_xfer,
|
|
.functionality = xgene_slimpro_i2c_func,
|
|
};
|
|
|
|
static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
|
|
{
|
|
struct slimpro_i2c_dev *ctx;
|
|
struct i2c_adapter *adapter;
|
|
struct mbox_client *cl;
|
|
int rc;
|
|
|
|
ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
ctx->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, ctx);
|
|
cl = &ctx->mbox_client;
|
|
|
|
/* Request mailbox channel */
|
|
cl->dev = &pdev->dev;
|
|
init_completion(&ctx->rd_complete);
|
|
cl->tx_tout = MAILBOX_OP_TIMEOUT;
|
|
cl->knows_txdone = false;
|
|
if (acpi_disabled) {
|
|
cl->tx_block = true;
|
|
cl->rx_callback = slimpro_i2c_rx_cb;
|
|
ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
|
|
if (IS_ERR(ctx->mbox_chan)) {
|
|
dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
|
|
return PTR_ERR(ctx->mbox_chan);
|
|
}
|
|
} else {
|
|
struct acpi_pcct_hw_reduced *cppc_ss;
|
|
const struct acpi_device_id *acpi_id;
|
|
int version = XGENE_SLIMPRO_I2C_V1;
|
|
|
|
acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
|
|
&pdev->dev);
|
|
if (!acpi_id)
|
|
return -EINVAL;
|
|
|
|
version = (int)acpi_id->driver_data;
|
|
|
|
if (device_property_read_u32(&pdev->dev, "pcc-channel",
|
|
&ctx->mbox_idx))
|
|
ctx->mbox_idx = MAILBOX_I2C_INDEX;
|
|
|
|
cl->tx_block = false;
|
|
cl->rx_callback = slimpro_i2c_pcc_rx_cb;
|
|
ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
|
|
if (IS_ERR(ctx->mbox_chan)) {
|
|
dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
|
|
return PTR_ERR(ctx->mbox_chan);
|
|
}
|
|
|
|
/*
|
|
* The PCC mailbox controller driver should
|
|
* have parsed the PCCT (global table of all
|
|
* PCC channels) and stored pointers to the
|
|
* subspace communication region in con_priv.
|
|
*/
|
|
cppc_ss = ctx->mbox_chan->con_priv;
|
|
if (!cppc_ss) {
|
|
dev_err(&pdev->dev, "PPC subspace not found\n");
|
|
rc = -ENOENT;
|
|
goto mbox_err;
|
|
}
|
|
|
|
if (!ctx->mbox_chan->mbox->txdone_irq) {
|
|
dev_err(&pdev->dev, "PCC IRQ not supported\n");
|
|
rc = -ENOENT;
|
|
goto mbox_err;
|
|
}
|
|
|
|
/*
|
|
* This is the shared communication region
|
|
* for the OS and Platform to communicate over.
|
|
*/
|
|
ctx->comm_base_addr = cppc_ss->base_address;
|
|
if (ctx->comm_base_addr) {
|
|
if (version == XGENE_SLIMPRO_I2C_V2)
|
|
ctx->pcc_comm_addr = memremap(
|
|
ctx->comm_base_addr,
|
|
cppc_ss->length,
|
|
MEMREMAP_WT);
|
|
else
|
|
ctx->pcc_comm_addr = memremap(
|
|
ctx->comm_base_addr,
|
|
cppc_ss->length,
|
|
MEMREMAP_WB);
|
|
} else {
|
|
dev_err(&pdev->dev, "Failed to get PCC comm region\n");
|
|
rc = -ENOENT;
|
|
goto mbox_err;
|
|
}
|
|
|
|
if (!ctx->pcc_comm_addr) {
|
|
dev_err(&pdev->dev,
|
|
"Failed to ioremap PCC comm region\n");
|
|
rc = -ENOMEM;
|
|
goto mbox_err;
|
|
}
|
|
}
|
|
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
|
|
if (rc)
|
|
dev_warn(&pdev->dev, "Unable to set dma mask\n");
|
|
|
|
/* Setup I2C adapter */
|
|
adapter = &ctx->adapter;
|
|
snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
|
|
adapter->algo = &xgene_slimpro_i2c_algorithm;
|
|
adapter->class = I2C_CLASS_HWMON;
|
|
adapter->dev.parent = &pdev->dev;
|
|
adapter->dev.of_node = pdev->dev.of_node;
|
|
ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
|
|
i2c_set_adapdata(adapter, ctx);
|
|
rc = i2c_add_adapter(adapter);
|
|
if (rc)
|
|
goto mbox_err;
|
|
|
|
dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
|
|
return 0;
|
|
|
|
mbox_err:
|
|
if (acpi_disabled)
|
|
mbox_free_channel(ctx->mbox_chan);
|
|
else
|
|
pcc_mbox_free_channel(ctx->mbox_chan);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
|
|
{
|
|
struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
|
|
|
|
i2c_del_adapter(&ctx->adapter);
|
|
|
|
if (acpi_disabled)
|
|
mbox_free_channel(ctx->mbox_chan);
|
|
else
|
|
pcc_mbox_free_channel(ctx->mbox_chan);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
|
|
{.compatible = "apm,xgene-slimpro-i2c" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
|
|
{"APMC0D40", XGENE_SLIMPRO_I2C_V1},
|
|
{"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
|
|
#endif
|
|
|
|
static struct platform_driver xgene_slimpro_i2c_driver = {
|
|
.probe = xgene_slimpro_i2c_probe,
|
|
.remove = xgene_slimpro_i2c_remove,
|
|
.driver = {
|
|
.name = "xgene-slimpro-i2c",
|
|
.of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
|
|
.acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
|
|
},
|
|
};
|
|
|
|
module_platform_driver(xgene_slimpro_i2c_driver);
|
|
|
|
MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
|
|
MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
|
|
MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
|
|
MODULE_LICENSE("GPL");
|