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This adds support for the interrupt controller present on PIC32 class devices. It handles all internal and external interrupts. This controller exists outside of the CPU core and is the arbitrator of all interrupts (including interrupts from the CPU itself) before they are presented to the CPU. The following features are supported: - DT properties for EVIC and for devices/peripherals that use interrupt lines - Persistent and non-persistent interrupt handling - irqdomain and generic chip support - Configuration of external interrupt edge polarity Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
59 lines
2.7 KiB
Makefile
59 lines
2.7 KiB
Makefile
obj-$(CONFIG_IRQCHIP) += irqchip.o
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obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
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obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
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obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
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obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
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obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
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obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
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obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
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obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
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obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
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obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
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obj-$(CONFIG_METAG) += irq-metag-ext.o
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obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
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obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o
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obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
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obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o
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obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o
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obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o
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obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o
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obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o
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obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
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obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
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obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
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obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o
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obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
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obj-$(CONFIG_ARM_VIC) += irq-vic.o
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obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
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obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o
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obj-$(CONFIG_I8259) += irq-i8259.o
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obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o
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obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o
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obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
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obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
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obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
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obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
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obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
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obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
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obj-$(CONFIG_ST_IRQCHIP) += irq-st.o
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obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o
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obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o
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obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o
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obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o
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obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o
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obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o
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obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o
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obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o
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obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o
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obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o
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obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o
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obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o
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obj-$(CONFIG_RENESAS_H8300H_INTC) += irq-renesas-h8300h.o
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obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o
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obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o
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obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o
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obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o
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obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
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