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b28e6315a0
- fix a PageHighMem check in dma-coherent initialization (Doug Berger) - clean up the coherency defaul initialiation (Jiaxun Yang) - add cacheline to user/kernel dma-debug space dump messages (Desnes Nunes, Geert Uytterhoeve) - swiotlb statistics improvements (Michael Kelley) - misc cleanups (Petr Tesarik) -----BEGIN PGP SIGNATURE----- iQI/BAABCgApFiEEgdbnc3r/njty3Iq9D55TZVIEUYMFAmRLYsoLHGhjaEBsc3Qu ZGUACgkQD55TZVIEUYP4+RAAwpIqI198CrPxodCuBdwetuxznwncdwFvU3W+NQLF cC5gDeUB2ZZevVh3moKITV7gXHrbTJF7jQs9jpWV0QEA5APzu0WDf3Y0m4sXPVpn E9jS3jGJyntZ9rIMzHFs/lguI37xzT1YRAHAYgoZ84b7K/9g94NgEE2HecfNKVqZ D6PN0UJcA4KQo+5UJ7MWiQxWM3QAwVfSKsP1mXv51tiRGo4UUzNW77Ej2nKRJjhK wDNiZ+08khfeS2BuF9J2ebAzpgma5EgweH2z7zmx8Ch5t4Cx6hVAQ4Z6axbZMGjP HxXPw5rIwZTnQYoaGU86BrxrFH2j2bb963kWoDzliH+4PQrJ/iIEpkF7vu5Y2oWr WtXdOo6CsdQh1rT1UWA87ZYDtkWgj3/ITv5xJrXf8VyD9WHHSPst616XHLzBLGzo Hc+lAPhnVm59XZhQbVgXZy37Eqa9qHEG6GIRUkwD13nttSSfLfizO0IlXlH+awQV 2A+TjbAt2lneUaRzMPfxG/yFt3rPqbBfSWj3o2ClPPn9sKksKxj7IjNW0v81Ztq/ H6UmYRuq+wlQJzlwiF8+6SzoBXObztrmtIa2ipiM5k+xePG1jsPGFLm98UMlPcxN 5IMz78DQ/hE3K3fKRt6clImd98xq5R0H9iUQPor2I7C/67fpTjThDRdHDUina1tk Oxo= =vAit -----END PGP SIGNATURE----- Merge tag 'dma-mapping-6.4-2023-04-28' of git://git.infradead.org/users/hch/dma-mapping Pull dma-mapping updates from Christoph Hellwig: - fix a PageHighMem check in dma-coherent initialization (Doug Berger) - clean up the coherency defaul initialiation (Jiaxun Yang) - add cacheline to user/kernel dma-debug space dump messages (Desnes Nunes, Geert Uytterhoeve) - swiotlb statistics improvements (Michael Kelley) - misc cleanups (Petr Tesarik) * tag 'dma-mapping-6.4-2023-04-28' of git://git.infradead.org/users/hch/dma-mapping: swiotlb: Omit total_used and used_hiwater if !CONFIG_DEBUG_FS swiotlb: track and report io_tlb_used high water marks in debugfs swiotlb: fix debugfs reporting of reserved memory pools swiotlb: relocate PageHighMem test away from rmem_swiotlb_setup of: address: always use dma_default_coherent for default coherency dma-mapping: provide CONFIG_ARCH_DMA_DEFAULT_COHERENT dma-mapping: provide a fallback dma_default_coherent dma-debug: Use %pa to format phys_addr_t dma-debug: add cacheline to user/kernel space dump messages dma-debug: small dma_debug_entry's comment and variable name updates dma-direct: cleanup parameters to dma_direct_optimal_gfp_mask
1109 lines
30 KiB
C
1109 lines
30 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Dynamic DMA mapping support.
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*
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* This implementation is a fallback for platforms that do not support
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* I/O TLBs (aka DMA address translation hardware).
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* Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
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* Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
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* Copyright (C) 2000, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
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* 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
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* unnecessary i-cache flushing.
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* 04/07/.. ak Better overflow handling. Assorted fixes.
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* 05/09/10 linville Add support for syncing ranges, support syncing for
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* DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
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* 08/12/11 beckyb Add highmem support
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*/
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#define pr_fmt(fmt) "software IO TLB: " fmt
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#include <linux/cache.h>
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#include <linux/cc_platform.h>
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#include <linux/ctype.h>
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#include <linux/debugfs.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-map-ops.h>
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#include <linux/export.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/io.h>
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#include <linux/iommu-helper.h>
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#include <linux/init.h>
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#include <linux/memblock.h>
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#include <linux/mm.h>
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#include <linux/pfn.h>
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#include <linux/scatterlist.h>
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#include <linux/set_memory.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/swiotlb.h>
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#include <linux/types.h>
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#ifdef CONFIG_DMA_RESTRICTED_POOL
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/slab.h>
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#endif
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#define CREATE_TRACE_POINTS
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#include <trace/events/swiotlb.h>
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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/*
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* Minimum IO TLB size to bother booting with. Systems with mainly
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* 64bit capable cards will only lightly use the swiotlb. If we can't
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* allocate a contiguous 1MB, we're probably in trouble anyway.
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*/
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
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struct io_tlb_slot {
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phys_addr_t orig_addr;
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size_t alloc_size;
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unsigned int list;
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};
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static bool swiotlb_force_bounce;
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static bool swiotlb_force_disable;
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struct io_tlb_mem io_tlb_default_mem;
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static unsigned long default_nslabs = IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT;
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static unsigned long default_nareas;
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/**
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* struct io_tlb_area - IO TLB memory area descriptor
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*
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* This is a single area with a single lock.
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*
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* @used: The number of used IO TLB block.
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* @index: The slot index to start searching in this area for next round.
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* @lock: The lock to protect the above data structures in the map and
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* unmap calls.
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*/
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struct io_tlb_area {
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unsigned long used;
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unsigned int index;
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spinlock_t lock;
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};
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/*
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* Round up number of slabs to the next power of 2. The last area is going
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* be smaller than the rest if default_nslabs is not power of two.
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* The number of slot in an area should be a multiple of IO_TLB_SEGSIZE,
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* otherwise a segment may span two or more areas. It conflicts with free
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* contiguous slots tracking: free slots are treated contiguous no matter
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* whether they cross an area boundary.
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*
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* Return true if default_nslabs is rounded up.
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*/
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static bool round_up_default_nslabs(void)
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{
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if (!default_nareas)
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return false;
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if (default_nslabs < IO_TLB_SEGSIZE * default_nareas)
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default_nslabs = IO_TLB_SEGSIZE * default_nareas;
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else if (is_power_of_2(default_nslabs))
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return false;
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default_nslabs = roundup_pow_of_two(default_nslabs);
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return true;
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}
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static void swiotlb_adjust_nareas(unsigned int nareas)
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{
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/* use a single area when non is specified */
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if (!nareas)
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nareas = 1;
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else if (!is_power_of_2(nareas))
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nareas = roundup_pow_of_two(nareas);
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default_nareas = nareas;
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pr_info("area num %d.\n", nareas);
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if (round_up_default_nslabs())
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pr_info("SWIOTLB bounce buffer size roundup to %luMB",
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(default_nslabs << IO_TLB_SHIFT) >> 20);
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}
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static int __init
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setup_io_tlb_npages(char *str)
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{
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if (isdigit(*str)) {
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/* avoid tail segment of size < IO_TLB_SEGSIZE */
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default_nslabs =
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ALIGN(simple_strtoul(str, &str, 0), IO_TLB_SEGSIZE);
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}
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if (*str == ',')
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++str;
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if (isdigit(*str))
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swiotlb_adjust_nareas(simple_strtoul(str, &str, 0));
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if (*str == ',')
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++str;
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if (!strcmp(str, "force"))
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swiotlb_force_bounce = true;
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else if (!strcmp(str, "noforce"))
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swiotlb_force_disable = true;
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return 0;
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}
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early_param("swiotlb", setup_io_tlb_npages);
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unsigned long swiotlb_size_or_default(void)
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{
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return default_nslabs << IO_TLB_SHIFT;
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}
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void __init swiotlb_adjust_size(unsigned long size)
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{
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/*
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* If swiotlb parameter has not been specified, give a chance to
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* architectures such as those supporting memory encryption to
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* adjust/expand SWIOTLB size for their use.
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*/
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if (default_nslabs != IO_TLB_DEFAULT_SIZE >> IO_TLB_SHIFT)
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return;
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size = ALIGN(size, IO_TLB_SIZE);
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default_nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
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if (round_up_default_nslabs())
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size = default_nslabs << IO_TLB_SHIFT;
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pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
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}
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void swiotlb_print_info(void)
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{
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struct io_tlb_mem *mem = &io_tlb_default_mem;
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if (!mem->nslabs) {
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pr_warn("No low mem\n");
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return;
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}
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pr_info("mapped [mem %pa-%pa] (%luMB)\n", &mem->start, &mem->end,
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(mem->nslabs << IO_TLB_SHIFT) >> 20);
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}
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static inline unsigned long io_tlb_offset(unsigned long val)
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{
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return val & (IO_TLB_SEGSIZE - 1);
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}
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static inline unsigned long nr_slots(u64 val)
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{
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return DIV_ROUND_UP(val, IO_TLB_SIZE);
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}
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/*
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* Early SWIOTLB allocation may be too early to allow an architecture to
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* perform the desired operations. This function allows the architecture to
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* call SWIOTLB when the operations are possible. It needs to be called
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* before the SWIOTLB memory is used.
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*/
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void __init swiotlb_update_mem_attributes(void)
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{
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struct io_tlb_mem *mem = &io_tlb_default_mem;
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unsigned long bytes;
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if (!mem->nslabs || mem->late_alloc)
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return;
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bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
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set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
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}
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static void swiotlb_init_io_tlb_mem(struct io_tlb_mem *mem, phys_addr_t start,
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unsigned long nslabs, unsigned int flags,
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bool late_alloc, unsigned int nareas)
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{
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void *vaddr = phys_to_virt(start);
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unsigned long bytes = nslabs << IO_TLB_SHIFT, i;
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mem->nslabs = nslabs;
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mem->start = start;
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mem->end = mem->start + bytes;
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mem->late_alloc = late_alloc;
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mem->nareas = nareas;
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mem->area_nslabs = nslabs / mem->nareas;
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mem->force_bounce = swiotlb_force_bounce || (flags & SWIOTLB_FORCE);
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for (i = 0; i < mem->nareas; i++) {
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spin_lock_init(&mem->areas[i].lock);
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mem->areas[i].index = 0;
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mem->areas[i].used = 0;
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}
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for (i = 0; i < mem->nslabs; i++) {
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mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
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mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
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mem->slots[i].alloc_size = 0;
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}
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memset(vaddr, 0, bytes);
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mem->vaddr = vaddr;
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return;
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}
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static void __init *swiotlb_memblock_alloc(unsigned long nslabs,
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unsigned int flags,
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int (*remap)(void *tlb, unsigned long nslabs))
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{
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size_t bytes = PAGE_ALIGN(nslabs << IO_TLB_SHIFT);
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void *tlb;
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/*
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* By default allocate the bounce buffer memory from low memory, but
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* allow to pick a location everywhere for hypervisors with guest
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* memory encryption.
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*/
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if (flags & SWIOTLB_ANY)
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tlb = memblock_alloc(bytes, PAGE_SIZE);
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else
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tlb = memblock_alloc_low(bytes, PAGE_SIZE);
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if (!tlb) {
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pr_warn("%s: Failed to allocate %zu bytes tlb structure\n",
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__func__, bytes);
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return NULL;
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}
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if (remap && remap(tlb, nslabs) < 0) {
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memblock_free(tlb, PAGE_ALIGN(bytes));
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pr_warn("%s: Failed to remap %zu bytes\n", __func__, bytes);
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return NULL;
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}
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return tlb;
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}
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/*
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* Statically reserve bounce buffer space and initialize bounce buffer data
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* structures for the software IO TLB used to implement the DMA API.
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*/
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void __init swiotlb_init_remap(bool addressing_limit, unsigned int flags,
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int (*remap)(void *tlb, unsigned long nslabs))
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{
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struct io_tlb_mem *mem = &io_tlb_default_mem;
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unsigned long nslabs;
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size_t alloc_size;
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void *tlb;
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if (!addressing_limit && !swiotlb_force_bounce)
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return;
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if (swiotlb_force_disable)
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return;
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/*
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* default_nslabs maybe changed when adjust area number.
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* So allocate bounce buffer after adjusting area number.
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*/
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if (!default_nareas)
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swiotlb_adjust_nareas(num_possible_cpus());
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nslabs = default_nslabs;
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while ((tlb = swiotlb_memblock_alloc(nslabs, flags, remap)) == NULL) {
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if (nslabs <= IO_TLB_MIN_SLABS)
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return;
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nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
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}
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if (default_nslabs != nslabs) {
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pr_info("SWIOTLB bounce buffer size adjusted %lu -> %lu slabs",
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default_nslabs, nslabs);
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default_nslabs = nslabs;
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}
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alloc_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), nslabs));
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mem->slots = memblock_alloc(alloc_size, PAGE_SIZE);
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if (!mem->slots) {
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pr_warn("%s: Failed to allocate %zu bytes align=0x%lx\n",
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__func__, alloc_size, PAGE_SIZE);
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return;
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}
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mem->areas = memblock_alloc(array_size(sizeof(struct io_tlb_area),
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default_nareas), SMP_CACHE_BYTES);
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if (!mem->areas) {
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pr_warn("%s: Failed to allocate mem->areas.\n", __func__);
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return;
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}
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swiotlb_init_io_tlb_mem(mem, __pa(tlb), nslabs, flags, false,
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default_nareas);
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if (flags & SWIOTLB_VERBOSE)
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swiotlb_print_info();
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}
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void __init swiotlb_init(bool addressing_limit, unsigned int flags)
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{
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swiotlb_init_remap(addressing_limit, flags, NULL);
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}
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|
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/*
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* Systems with larger DMA zones (those that don't support ISA) can
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* initialize the swiotlb later using the slab allocator if needed.
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* This should be just like above, but with some error catching.
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*/
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int swiotlb_init_late(size_t size, gfp_t gfp_mask,
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int (*remap)(void *tlb, unsigned long nslabs))
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{
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struct io_tlb_mem *mem = &io_tlb_default_mem;
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unsigned long nslabs = ALIGN(size >> IO_TLB_SHIFT, IO_TLB_SEGSIZE);
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unsigned char *vstart = NULL;
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unsigned int order, area_order;
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bool retried = false;
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int rc = 0;
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if (swiotlb_force_disable)
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return 0;
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retry:
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order = get_order(nslabs << IO_TLB_SHIFT);
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nslabs = SLABS_PER_PAGE << order;
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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vstart = (void *)__get_free_pages(gfp_mask | __GFP_NOWARN,
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order);
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if (vstart)
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break;
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order--;
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nslabs = SLABS_PER_PAGE << order;
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retried = true;
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}
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|
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if (!vstart)
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return -ENOMEM;
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|
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if (remap)
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rc = remap(vstart, nslabs);
|
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if (rc) {
|
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free_pages((unsigned long)vstart, order);
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|
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nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
|
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if (nslabs < IO_TLB_MIN_SLABS)
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return rc;
|
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retried = true;
|
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goto retry;
|
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}
|
|
|
|
if (retried) {
|
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pr_warn("only able to allocate %ld MB\n",
|
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(PAGE_SIZE << order) >> 20);
|
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}
|
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|
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if (!default_nareas)
|
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swiotlb_adjust_nareas(num_possible_cpus());
|
|
|
|
area_order = get_order(array_size(sizeof(*mem->areas),
|
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default_nareas));
|
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mem->areas = (struct io_tlb_area *)
|
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__get_free_pages(GFP_KERNEL | __GFP_ZERO, area_order);
|
|
if (!mem->areas)
|
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goto error_area;
|
|
|
|
mem->slots = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
|
|
get_order(array_size(sizeof(*mem->slots), nslabs)));
|
|
if (!mem->slots)
|
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goto error_slots;
|
|
|
|
set_memory_decrypted((unsigned long)vstart,
|
|
(nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
|
|
swiotlb_init_io_tlb_mem(mem, virt_to_phys(vstart), nslabs, 0, true,
|
|
default_nareas);
|
|
|
|
swiotlb_print_info();
|
|
return 0;
|
|
|
|
error_slots:
|
|
free_pages((unsigned long)mem->areas, area_order);
|
|
error_area:
|
|
free_pages((unsigned long)vstart, order);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
void __init swiotlb_exit(void)
|
|
{
|
|
struct io_tlb_mem *mem = &io_tlb_default_mem;
|
|
unsigned long tbl_vaddr;
|
|
size_t tbl_size, slots_size;
|
|
unsigned int area_order;
|
|
|
|
if (swiotlb_force_bounce)
|
|
return;
|
|
|
|
if (!mem->nslabs)
|
|
return;
|
|
|
|
pr_info("tearing down default memory pool\n");
|
|
tbl_vaddr = (unsigned long)phys_to_virt(mem->start);
|
|
tbl_size = PAGE_ALIGN(mem->end - mem->start);
|
|
slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs));
|
|
|
|
set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
|
|
if (mem->late_alloc) {
|
|
area_order = get_order(array_size(sizeof(*mem->areas),
|
|
mem->nareas));
|
|
free_pages((unsigned long)mem->areas, area_order);
|
|
free_pages(tbl_vaddr, get_order(tbl_size));
|
|
free_pages((unsigned long)mem->slots, get_order(slots_size));
|
|
} else {
|
|
memblock_free_late(__pa(mem->areas),
|
|
array_size(sizeof(*mem->areas), mem->nareas));
|
|
memblock_free_late(mem->start, tbl_size);
|
|
memblock_free_late(__pa(mem->slots), slots_size);
|
|
}
|
|
|
|
memset(mem, 0, sizeof(*mem));
|
|
}
|
|
|
|
/*
|
|
* Return the offset into a iotlb slot required to keep the device happy.
|
|
*/
|
|
static unsigned int swiotlb_align_offset(struct device *dev, u64 addr)
|
|
{
|
|
return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1);
|
|
}
|
|
|
|
/*
|
|
* Bounce: copy the swiotlb buffer from or back to the original dma location
|
|
*/
|
|
static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT;
|
|
phys_addr_t orig_addr = mem->slots[index].orig_addr;
|
|
size_t alloc_size = mem->slots[index].alloc_size;
|
|
unsigned long pfn = PFN_DOWN(orig_addr);
|
|
unsigned char *vaddr = mem->vaddr + tlb_addr - mem->start;
|
|
unsigned int tlb_offset, orig_addr_offset;
|
|
|
|
if (orig_addr == INVALID_PHYS_ADDR)
|
|
return;
|
|
|
|
tlb_offset = tlb_addr & (IO_TLB_SIZE - 1);
|
|
orig_addr_offset = swiotlb_align_offset(dev, orig_addr);
|
|
if (tlb_offset < orig_addr_offset) {
|
|
dev_WARN_ONCE(dev, 1,
|
|
"Access before mapping start detected. orig offset %u, requested offset %u.\n",
|
|
orig_addr_offset, tlb_offset);
|
|
return;
|
|
}
|
|
|
|
tlb_offset -= orig_addr_offset;
|
|
if (tlb_offset > alloc_size) {
|
|
dev_WARN_ONCE(dev, 1,
|
|
"Buffer overflow detected. Allocation size: %zu. Mapping size: %zu+%u.\n",
|
|
alloc_size, size, tlb_offset);
|
|
return;
|
|
}
|
|
|
|
orig_addr += tlb_offset;
|
|
alloc_size -= tlb_offset;
|
|
|
|
if (size > alloc_size) {
|
|
dev_WARN_ONCE(dev, 1,
|
|
"Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n",
|
|
alloc_size, size);
|
|
size = alloc_size;
|
|
}
|
|
|
|
if (PageHighMem(pfn_to_page(pfn))) {
|
|
unsigned int offset = orig_addr & ~PAGE_MASK;
|
|
struct page *page;
|
|
unsigned int sz = 0;
|
|
unsigned long flags;
|
|
|
|
while (size) {
|
|
sz = min_t(size_t, PAGE_SIZE - offset, size);
|
|
|
|
local_irq_save(flags);
|
|
page = pfn_to_page(pfn);
|
|
if (dir == DMA_TO_DEVICE)
|
|
memcpy_from_page(vaddr, page, offset, sz);
|
|
else
|
|
memcpy_to_page(page, offset, vaddr, sz);
|
|
local_irq_restore(flags);
|
|
|
|
size -= sz;
|
|
pfn++;
|
|
vaddr += sz;
|
|
offset = 0;
|
|
}
|
|
} else if (dir == DMA_TO_DEVICE) {
|
|
memcpy(vaddr, phys_to_virt(orig_addr), size);
|
|
} else {
|
|
memcpy(phys_to_virt(orig_addr), vaddr, size);
|
|
}
|
|
}
|
|
|
|
static inline phys_addr_t slot_addr(phys_addr_t start, phys_addr_t idx)
|
|
{
|
|
return start + (idx << IO_TLB_SHIFT);
|
|
}
|
|
|
|
/*
|
|
* Carefully handle integer overflow which can occur when boundary_mask == ~0UL.
|
|
*/
|
|
static inline unsigned long get_max_slots(unsigned long boundary_mask)
|
|
{
|
|
if (boundary_mask == ~0UL)
|
|
return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
|
|
return nr_slots(boundary_mask + 1);
|
|
}
|
|
|
|
static unsigned int wrap_area_index(struct io_tlb_mem *mem, unsigned int index)
|
|
{
|
|
if (index >= mem->area_nslabs)
|
|
return 0;
|
|
return index;
|
|
}
|
|
|
|
/*
|
|
* Track the total used slots with a global atomic value in order to have
|
|
* correct information to determine the high water mark. The mem_used()
|
|
* function gives imprecise results because there's no locking across
|
|
* multiple areas.
|
|
*/
|
|
#ifdef CONFIG_DEBUG_FS
|
|
static void inc_used_and_hiwater(struct io_tlb_mem *mem, unsigned int nslots)
|
|
{
|
|
unsigned long old_hiwater, new_used;
|
|
|
|
new_used = atomic_long_add_return(nslots, &mem->total_used);
|
|
old_hiwater = atomic_long_read(&mem->used_hiwater);
|
|
do {
|
|
if (new_used <= old_hiwater)
|
|
break;
|
|
} while (!atomic_long_try_cmpxchg(&mem->used_hiwater,
|
|
&old_hiwater, new_used));
|
|
}
|
|
|
|
static void dec_used(struct io_tlb_mem *mem, unsigned int nslots)
|
|
{
|
|
atomic_long_sub(nslots, &mem->total_used);
|
|
}
|
|
|
|
#else /* !CONFIG_DEBUG_FS */
|
|
static void inc_used_and_hiwater(struct io_tlb_mem *mem, unsigned int nslots)
|
|
{
|
|
}
|
|
static void dec_used(struct io_tlb_mem *mem, unsigned int nslots)
|
|
{
|
|
}
|
|
#endif /* CONFIG_DEBUG_FS */
|
|
|
|
/*
|
|
* Find a suitable number of IO TLB entries size that will fit this request and
|
|
* allocate a buffer from that IO TLB pool.
|
|
*/
|
|
static int swiotlb_do_find_slots(struct device *dev, int area_index,
|
|
phys_addr_t orig_addr, size_t alloc_size,
|
|
unsigned int alloc_align_mask)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
struct io_tlb_area *area = mem->areas + area_index;
|
|
unsigned long boundary_mask = dma_get_seg_boundary(dev);
|
|
dma_addr_t tbl_dma_addr =
|
|
phys_to_dma_unencrypted(dev, mem->start) & boundary_mask;
|
|
unsigned long max_slots = get_max_slots(boundary_mask);
|
|
unsigned int iotlb_align_mask =
|
|
dma_get_min_align_mask(dev) | alloc_align_mask;
|
|
unsigned int nslots = nr_slots(alloc_size), stride;
|
|
unsigned int offset = swiotlb_align_offset(dev, orig_addr);
|
|
unsigned int index, slots_checked, count = 0, i;
|
|
unsigned long flags;
|
|
unsigned int slot_base;
|
|
unsigned int slot_index;
|
|
|
|
BUG_ON(!nslots);
|
|
BUG_ON(area_index >= mem->nareas);
|
|
|
|
/*
|
|
* For allocations of PAGE_SIZE or larger only look for page aligned
|
|
* allocations.
|
|
*/
|
|
if (alloc_size >= PAGE_SIZE)
|
|
iotlb_align_mask |= ~PAGE_MASK;
|
|
iotlb_align_mask &= ~(IO_TLB_SIZE - 1);
|
|
|
|
/*
|
|
* For mappings with an alignment requirement don't bother looping to
|
|
* unaligned slots once we found an aligned one.
|
|
*/
|
|
stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1;
|
|
|
|
spin_lock_irqsave(&area->lock, flags);
|
|
if (unlikely(nslots > mem->area_nslabs - area->used))
|
|
goto not_found;
|
|
|
|
slot_base = area_index * mem->area_nslabs;
|
|
index = area->index;
|
|
|
|
for (slots_checked = 0; slots_checked < mem->area_nslabs; ) {
|
|
slot_index = slot_base + index;
|
|
|
|
if (orig_addr &&
|
|
(slot_addr(tbl_dma_addr, slot_index) &
|
|
iotlb_align_mask) != (orig_addr & iotlb_align_mask)) {
|
|
index = wrap_area_index(mem, index + 1);
|
|
slots_checked++;
|
|
continue;
|
|
}
|
|
|
|
/*
|
|
* If we find a slot that indicates we have 'nslots' number of
|
|
* contiguous buffers, we allocate the buffers from that slot
|
|
* and mark the entries as '0' indicating unavailable.
|
|
*/
|
|
if (!iommu_is_span_boundary(slot_index, nslots,
|
|
nr_slots(tbl_dma_addr),
|
|
max_slots)) {
|
|
if (mem->slots[slot_index].list >= nslots)
|
|
goto found;
|
|
}
|
|
index = wrap_area_index(mem, index + stride);
|
|
slots_checked += stride;
|
|
}
|
|
|
|
not_found:
|
|
spin_unlock_irqrestore(&area->lock, flags);
|
|
return -1;
|
|
|
|
found:
|
|
for (i = slot_index; i < slot_index + nslots; i++) {
|
|
mem->slots[i].list = 0;
|
|
mem->slots[i].alloc_size = alloc_size - (offset +
|
|
((i - slot_index) << IO_TLB_SHIFT));
|
|
}
|
|
for (i = slot_index - 1;
|
|
io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 &&
|
|
mem->slots[i].list; i--)
|
|
mem->slots[i].list = ++count;
|
|
|
|
/*
|
|
* Update the indices to avoid searching in the next round.
|
|
*/
|
|
area->index = wrap_area_index(mem, index + nslots);
|
|
area->used += nslots;
|
|
spin_unlock_irqrestore(&area->lock, flags);
|
|
|
|
inc_used_and_hiwater(mem, nslots);
|
|
return slot_index;
|
|
}
|
|
|
|
static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
|
|
size_t alloc_size, unsigned int alloc_align_mask)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
int start = raw_smp_processor_id() & (mem->nareas - 1);
|
|
int i = start, index;
|
|
|
|
do {
|
|
index = swiotlb_do_find_slots(dev, i, orig_addr, alloc_size,
|
|
alloc_align_mask);
|
|
if (index >= 0)
|
|
return index;
|
|
if (++i >= mem->nareas)
|
|
i = 0;
|
|
} while (i != start);
|
|
|
|
return -1;
|
|
}
|
|
|
|
static unsigned long mem_used(struct io_tlb_mem *mem)
|
|
{
|
|
int i;
|
|
unsigned long used = 0;
|
|
|
|
for (i = 0; i < mem->nareas; i++)
|
|
used += mem->areas[i].used;
|
|
return used;
|
|
}
|
|
|
|
phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
|
|
size_t mapping_size, size_t alloc_size,
|
|
unsigned int alloc_align_mask, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
unsigned int offset = swiotlb_align_offset(dev, orig_addr);
|
|
unsigned int i;
|
|
int index;
|
|
phys_addr_t tlb_addr;
|
|
|
|
if (!mem || !mem->nslabs) {
|
|
dev_warn_ratelimited(dev,
|
|
"Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
|
|
return (phys_addr_t)DMA_MAPPING_ERROR;
|
|
}
|
|
|
|
if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
|
|
pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
|
|
|
|
if (mapping_size > alloc_size) {
|
|
dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
|
|
mapping_size, alloc_size);
|
|
return (phys_addr_t)DMA_MAPPING_ERROR;
|
|
}
|
|
|
|
index = swiotlb_find_slots(dev, orig_addr,
|
|
alloc_size + offset, alloc_align_mask);
|
|
if (index == -1) {
|
|
if (!(attrs & DMA_ATTR_NO_WARN))
|
|
dev_warn_ratelimited(dev,
|
|
"swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
|
|
alloc_size, mem->nslabs, mem_used(mem));
|
|
return (phys_addr_t)DMA_MAPPING_ERROR;
|
|
}
|
|
|
|
/*
|
|
* Save away the mapping from the original address to the DMA address.
|
|
* This is needed when we sync the memory. Then we sync the buffer if
|
|
* needed.
|
|
*/
|
|
for (i = 0; i < nr_slots(alloc_size + offset); i++)
|
|
mem->slots[index + i].orig_addr = slot_addr(orig_addr, i);
|
|
tlb_addr = slot_addr(mem->start, index) + offset;
|
|
/*
|
|
* When dir == DMA_FROM_DEVICE we could omit the copy from the orig
|
|
* to the tlb buffer, if we knew for sure the device will
|
|
* overwrite the entire current content. But we don't. Thus
|
|
* unconditional bounce may prevent leaking swiotlb content (i.e.
|
|
* kernel memory) to user-space.
|
|
*/
|
|
swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE);
|
|
return tlb_addr;
|
|
}
|
|
|
|
static void swiotlb_release_slots(struct device *dev, phys_addr_t tlb_addr)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
unsigned long flags;
|
|
unsigned int offset = swiotlb_align_offset(dev, tlb_addr);
|
|
int index = (tlb_addr - offset - mem->start) >> IO_TLB_SHIFT;
|
|
int nslots = nr_slots(mem->slots[index].alloc_size + offset);
|
|
int aindex = index / mem->area_nslabs;
|
|
struct io_tlb_area *area = &mem->areas[aindex];
|
|
int count, i;
|
|
|
|
/*
|
|
* Return the buffer to the free list by setting the corresponding
|
|
* entries to indicate the number of contiguous entries available.
|
|
* While returning the entries to the free list, we merge the entries
|
|
* with slots below and above the pool being returned.
|
|
*/
|
|
BUG_ON(aindex >= mem->nareas);
|
|
|
|
spin_lock_irqsave(&area->lock, flags);
|
|
if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE))
|
|
count = mem->slots[index + nslots].list;
|
|
else
|
|
count = 0;
|
|
|
|
/*
|
|
* Step 1: return the slots to the free list, merging the slots with
|
|
* superceeding slots
|
|
*/
|
|
for (i = index + nslots - 1; i >= index; i--) {
|
|
mem->slots[i].list = ++count;
|
|
mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
|
|
mem->slots[i].alloc_size = 0;
|
|
}
|
|
|
|
/*
|
|
* Step 2: merge the returned slots with the preceding slots, if
|
|
* available (non zero)
|
|
*/
|
|
for (i = index - 1;
|
|
io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && mem->slots[i].list;
|
|
i--)
|
|
mem->slots[i].list = ++count;
|
|
area->used -= nslots;
|
|
spin_unlock_irqrestore(&area->lock, flags);
|
|
|
|
dec_used(mem, nslots);
|
|
}
|
|
|
|
/*
|
|
* tlb_addr is the physical address of the bounce buffer to unmap.
|
|
*/
|
|
void swiotlb_tbl_unmap_single(struct device *dev, phys_addr_t tlb_addr,
|
|
size_t mapping_size, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
/*
|
|
* First, sync the memory before unmapping the entry
|
|
*/
|
|
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
|
(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_FROM_DEVICE);
|
|
|
|
swiotlb_release_slots(dev, tlb_addr);
|
|
}
|
|
|
|
void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
|
|
swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_FROM_DEVICE);
|
|
}
|
|
|
|
void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
|
|
swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_TO_DEVICE);
|
|
}
|
|
|
|
/*
|
|
* Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
|
|
* to the device copy the data into it as well.
|
|
*/
|
|
dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
phys_addr_t swiotlb_addr;
|
|
dma_addr_t dma_addr;
|
|
|
|
trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size);
|
|
|
|
swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, 0, dir,
|
|
attrs);
|
|
if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
/* Ensure that the address returned is DMA'ble */
|
|
dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
|
|
if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
|
|
swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
|
|
attrs | DMA_ATTR_SKIP_CPU_SYNC);
|
|
dev_WARN_ONCE(dev, 1,
|
|
"swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
|
|
&dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
|
|
return DMA_MAPPING_ERROR;
|
|
}
|
|
|
|
if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
|
|
arch_sync_dma_for_device(swiotlb_addr, size, dir);
|
|
return dma_addr;
|
|
}
|
|
|
|
size_t swiotlb_max_mapping_size(struct device *dev)
|
|
{
|
|
int min_align_mask = dma_get_min_align_mask(dev);
|
|
int min_align = 0;
|
|
|
|
/*
|
|
* swiotlb_find_slots() skips slots according to
|
|
* min align mask. This affects max mapping size.
|
|
* Take it into acount here.
|
|
*/
|
|
if (min_align_mask)
|
|
min_align = roundup(min_align_mask, IO_TLB_SIZE);
|
|
|
|
return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE - min_align;
|
|
}
|
|
|
|
bool is_swiotlb_active(struct device *dev)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
|
|
return mem && mem->nslabs;
|
|
}
|
|
EXPORT_SYMBOL_GPL(is_swiotlb_active);
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
static int io_tlb_used_get(void *data, u64 *val)
|
|
{
|
|
struct io_tlb_mem *mem = data;
|
|
|
|
*val = mem_used(mem);
|
|
return 0;
|
|
}
|
|
|
|
static int io_tlb_hiwater_get(void *data, u64 *val)
|
|
{
|
|
struct io_tlb_mem *mem = data;
|
|
|
|
*val = atomic_long_read(&mem->used_hiwater);
|
|
return 0;
|
|
}
|
|
|
|
static int io_tlb_hiwater_set(void *data, u64 val)
|
|
{
|
|
struct io_tlb_mem *mem = data;
|
|
|
|
/* Only allow setting to zero */
|
|
if (val != 0)
|
|
return -EINVAL;
|
|
|
|
atomic_long_set(&mem->used_hiwater, val);
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_DEBUGFS_ATTRIBUTE(fops_io_tlb_used, io_tlb_used_get, NULL, "%llu\n");
|
|
DEFINE_DEBUGFS_ATTRIBUTE(fops_io_tlb_hiwater, io_tlb_hiwater_get,
|
|
io_tlb_hiwater_set, "%llu\n");
|
|
|
|
static void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
|
|
const char *dirname)
|
|
{
|
|
atomic_long_set(&mem->total_used, 0);
|
|
atomic_long_set(&mem->used_hiwater, 0);
|
|
|
|
mem->debugfs = debugfs_create_dir(dirname, io_tlb_default_mem.debugfs);
|
|
if (!mem->nslabs)
|
|
return;
|
|
|
|
debugfs_create_ulong("io_tlb_nslabs", 0400, mem->debugfs, &mem->nslabs);
|
|
debugfs_create_file("io_tlb_used", 0400, mem->debugfs, mem,
|
|
&fops_io_tlb_used);
|
|
debugfs_create_file("io_tlb_used_hiwater", 0600, mem->debugfs, mem,
|
|
&fops_io_tlb_hiwater);
|
|
}
|
|
|
|
static int __init swiotlb_create_default_debugfs(void)
|
|
{
|
|
swiotlb_create_debugfs_files(&io_tlb_default_mem, "swiotlb");
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(swiotlb_create_default_debugfs);
|
|
|
|
#else /* !CONFIG_DEBUG_FS */
|
|
|
|
static inline void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
|
|
const char *dirname)
|
|
{
|
|
}
|
|
|
|
#endif /* CONFIG_DEBUG_FS */
|
|
|
|
#ifdef CONFIG_DMA_RESTRICTED_POOL
|
|
|
|
struct page *swiotlb_alloc(struct device *dev, size_t size)
|
|
{
|
|
struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
|
|
phys_addr_t tlb_addr;
|
|
int index;
|
|
|
|
if (!mem)
|
|
return NULL;
|
|
|
|
index = swiotlb_find_slots(dev, 0, size, 0);
|
|
if (index == -1)
|
|
return NULL;
|
|
|
|
tlb_addr = slot_addr(mem->start, index);
|
|
|
|
return pfn_to_page(PFN_DOWN(tlb_addr));
|
|
}
|
|
|
|
bool swiotlb_free(struct device *dev, struct page *page, size_t size)
|
|
{
|
|
phys_addr_t tlb_addr = page_to_phys(page);
|
|
|
|
if (!is_swiotlb_buffer(dev, tlb_addr))
|
|
return false;
|
|
|
|
swiotlb_release_slots(dev, tlb_addr);
|
|
|
|
return true;
|
|
}
|
|
|
|
static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
|
|
struct device *dev)
|
|
{
|
|
struct io_tlb_mem *mem = rmem->priv;
|
|
unsigned long nslabs = rmem->size >> IO_TLB_SHIFT;
|
|
|
|
/* Set Per-device io tlb area to one */
|
|
unsigned int nareas = 1;
|
|
|
|
if (PageHighMem(pfn_to_page(PHYS_PFN(rmem->base)))) {
|
|
dev_err(dev, "Restricted DMA pool must be accessible within the linear mapping.");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* Since multiple devices can share the same pool, the private data,
|
|
* io_tlb_mem struct, will be initialized by the first device attached
|
|
* to it.
|
|
*/
|
|
if (!mem) {
|
|
mem = kzalloc(sizeof(*mem), GFP_KERNEL);
|
|
if (!mem)
|
|
return -ENOMEM;
|
|
|
|
mem->slots = kcalloc(nslabs, sizeof(*mem->slots), GFP_KERNEL);
|
|
if (!mem->slots) {
|
|
kfree(mem);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
mem->areas = kcalloc(nareas, sizeof(*mem->areas),
|
|
GFP_KERNEL);
|
|
if (!mem->areas) {
|
|
kfree(mem->slots);
|
|
kfree(mem);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
|
|
rmem->size >> PAGE_SHIFT);
|
|
swiotlb_init_io_tlb_mem(mem, rmem->base, nslabs, SWIOTLB_FORCE,
|
|
false, nareas);
|
|
mem->for_alloc = true;
|
|
|
|
rmem->priv = mem;
|
|
|
|
swiotlb_create_debugfs_files(mem, rmem->name);
|
|
}
|
|
|
|
dev->dma_io_tlb_mem = mem;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rmem_swiotlb_device_release(struct reserved_mem *rmem,
|
|
struct device *dev)
|
|
{
|
|
dev->dma_io_tlb_mem = &io_tlb_default_mem;
|
|
}
|
|
|
|
static const struct reserved_mem_ops rmem_swiotlb_ops = {
|
|
.device_init = rmem_swiotlb_device_init,
|
|
.device_release = rmem_swiotlb_device_release,
|
|
};
|
|
|
|
static int __init rmem_swiotlb_setup(struct reserved_mem *rmem)
|
|
{
|
|
unsigned long node = rmem->fdt_node;
|
|
|
|
if (of_get_flat_dt_prop(node, "reusable", NULL) ||
|
|
of_get_flat_dt_prop(node, "linux,cma-default", NULL) ||
|
|
of_get_flat_dt_prop(node, "linux,dma-default", NULL) ||
|
|
of_get_flat_dt_prop(node, "no-map", NULL))
|
|
return -EINVAL;
|
|
|
|
rmem->ops = &rmem_swiotlb_ops;
|
|
pr_info("Reserved memory: created restricted DMA pool at %pa, size %ld MiB\n",
|
|
&rmem->base, (unsigned long)rmem->size / SZ_1M);
|
|
return 0;
|
|
}
|
|
|
|
RESERVEDMEM_OF_DECLARE(dma, "restricted-dma-pool", rmem_swiotlb_setup);
|
|
#endif /* CONFIG_DMA_RESTRICTED_POOL */
|