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Add PRCM partition, CM instance register address offset, and clockdomain register address offset to each OMAP4 struct clockdomain record. Add OMAP4 clockdomain code to use this new data to access registers properly. While here, clean up some nearby clockdomain code to allocate auto variables in my recollection of Linus's preferred style. The autogeneration scripts have been updated. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
32 lines
1.2 KiB
C
32 lines
1.2 KiB
C
/*
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* OMAP4 Clock Management (CM) function prototypes
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*
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* Copyright (C) 2010 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
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#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
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extern bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs);
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extern void omap4_cminst_clkdm_enable_hwsup(u8 part, s16 inst, u16 cdoffs);
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extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs);
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extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
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extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
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/*
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* In an ideal world, we would not export these low-level functions,
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* but this will probably take some time to fix properly
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*/
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extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
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extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
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extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
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s16 inst, s16 idx);
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extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
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#endif
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