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45ef5992e0
asm/tlbflush.h is only needed for: - using functions xxx_flush_tlb_xxx() - using MMU_NO_CONTEXT - including asm-generic/pgtable.h Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
445 lines
11 KiB
C
445 lines
11 KiB
C
/*
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* Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Varun Sethi, <varun.sethi@freescale.com>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/e500.c,
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* by Yu Liu <yu.liu@freescale.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kvm_host.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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#include <asm/kvm_ppc.h>
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#include <asm/dbell.h>
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#include "booke.h"
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#include "e500.h"
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void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type)
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{
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enum ppc_dbell dbell_type;
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unsigned long tag;
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switch (type) {
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case INT_CLASS_NONCRIT:
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dbell_type = PPC_G_DBELL;
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break;
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case INT_CLASS_CRIT:
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dbell_type = PPC_G_DBELL_CRIT;
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break;
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case INT_CLASS_MC:
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dbell_type = PPC_G_DBELL_MC;
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break;
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default:
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WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type);
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return;
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}
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preempt_disable();
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tag = PPC_DBELL_LPID(get_lpid(vcpu)) | vcpu->vcpu_id;
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mb();
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ppc_msgsnd(dbell_type, 0, tag);
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preempt_enable();
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}
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/* gtlbe must not be mapped by more than one host tlb entry */
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void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
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struct kvm_book3e_206_tlb_entry *gtlbe)
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{
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unsigned int tid, ts;
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gva_t eaddr;
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u32 val;
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unsigned long flags;
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ts = get_tlb_ts(gtlbe);
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tid = get_tlb_tid(gtlbe);
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/* We search the host TLB to invalidate its shadow TLB entry */
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val = (tid << 16) | ts;
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eaddr = get_tlb_eaddr(gtlbe);
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local_irq_save(flags);
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mtspr(SPRN_MAS6, val);
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mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
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asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr));
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val = mfspr(SPRN_MAS1);
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if (val & MAS1_VALID) {
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mtspr(SPRN_MAS1, val & ~MAS1_VALID);
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asm volatile("tlbwe");
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}
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mtspr(SPRN_MAS5, 0);
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/* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */
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mtspr(SPRN_MAS8, 0);
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isync();
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local_irq_restore(flags);
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}
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void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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unsigned long flags;
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local_irq_save(flags);
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mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
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asm volatile("tlbilxlpid");
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mtspr(SPRN_MAS5, 0);
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local_irq_restore(flags);
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}
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void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
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{
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vcpu->arch.pid = pid;
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}
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void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
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{
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}
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/* We use two lpids per VM */
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static DEFINE_PER_CPU(struct kvm_vcpu *[KVMPPC_NR_LPIDS], last_vcpu_of_lpid);
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static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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kvmppc_booke_vcpu_load(vcpu, cpu);
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mtspr(SPRN_LPID, get_lpid(vcpu));
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mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
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mtspr(SPRN_GPIR, vcpu->vcpu_id);
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mtspr(SPRN_MSRP, vcpu->arch.shadow_msrp);
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vcpu->arch.eplc = EPC_EGS | (get_lpid(vcpu) << EPC_ELPID_SHIFT);
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vcpu->arch.epsc = vcpu->arch.eplc;
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mtspr(SPRN_EPLC, vcpu->arch.eplc);
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mtspr(SPRN_EPSC, vcpu->arch.epsc);
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mtspr(SPRN_GIVPR, vcpu->arch.ivpr);
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mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
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mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
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mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0);
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mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1);
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mtspr(SPRN_GSPRG2, (unsigned long)vcpu->arch.shared->sprg2);
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mtspr(SPRN_GSPRG3, (unsigned long)vcpu->arch.shared->sprg3);
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mtspr(SPRN_GSRR0, vcpu->arch.shared->srr0);
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mtspr(SPRN_GSRR1, vcpu->arch.shared->srr1);
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mtspr(SPRN_GEPR, vcpu->arch.epr);
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mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
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mtspr(SPRN_GESR, vcpu->arch.shared->esr);
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if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
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__this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
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kvmppc_e500_tlbil_all(vcpu_e500);
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__this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
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}
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}
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static void kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.eplc = mfspr(SPRN_EPLC);
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vcpu->arch.epsc = mfspr(SPRN_EPSC);
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vcpu->arch.shared->sprg0 = mfspr(SPRN_GSPRG0);
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vcpu->arch.shared->sprg1 = mfspr(SPRN_GSPRG1);
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vcpu->arch.shared->sprg2 = mfspr(SPRN_GSPRG2);
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vcpu->arch.shared->sprg3 = mfspr(SPRN_GSPRG3);
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vcpu->arch.shared->srr0 = mfspr(SPRN_GSRR0);
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vcpu->arch.shared->srr1 = mfspr(SPRN_GSRR1);
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vcpu->arch.epr = mfspr(SPRN_GEPR);
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vcpu->arch.shared->dar = mfspr(SPRN_GDEAR);
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vcpu->arch.shared->esr = mfspr(SPRN_GESR);
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vcpu->arch.oldpir = mfspr(SPRN_PIR);
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kvmppc_booke_vcpu_put(vcpu);
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}
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int kvmppc_core_check_processor_compat(void)
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{
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int r;
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if (strcmp(cur_cpu_spec->cpu_name, "e500mc") == 0)
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r = 0;
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else if (strcmp(cur_cpu_spec->cpu_name, "e5500") == 0)
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r = 0;
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#ifdef CONFIG_ALTIVEC
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/*
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* Since guests have the privilege to enable AltiVec, we need AltiVec
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* support in the host to save/restore their context.
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* Don't use CPU_FTR_ALTIVEC to identify cores with AltiVec unit
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* because it's cleared in the absence of CONFIG_ALTIVEC!
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*/
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else if (strcmp(cur_cpu_spec->cpu_name, "e6500") == 0)
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r = 0;
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#endif
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else
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r = -ENOTSUPP;
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return r;
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}
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int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
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SPRN_EPCR_DUVD;
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#ifdef CONFIG_64BIT
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vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
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#endif
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vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_PMMP;
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vcpu->arch.pvr = mfspr(SPRN_PVR);
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vcpu_e500->svr = mfspr(SPRN_SVR);
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vcpu->arch.cpu_type = KVM_CPU_E500MC;
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return 0;
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}
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static int kvmppc_core_get_sregs_e500mc(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM |
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KVM_SREGS_E_PC;
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sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
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sregs->u.e.impl.fsl.features = 0;
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sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
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sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
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sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
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kvmppc_get_sregs_e500_tlb(vcpu, sregs);
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sregs->u.e.ivor_high[3] =
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vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
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sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
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sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
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return kvmppc_get_sregs_ivor(vcpu, sregs);
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}
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static int kvmppc_core_set_sregs_e500mc(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int ret;
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if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
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vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
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vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
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vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
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}
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ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);
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if (ret < 0)
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return ret;
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if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
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return 0;
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if (sregs->u.e.features & KVM_SREGS_E_PM) {
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vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
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sregs->u.e.ivor_high[3];
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}
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if (sregs->u.e.features & KVM_SREGS_E_PC) {
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] =
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sregs->u.e.ivor_high[4];
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vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =
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sregs->u.e.ivor_high[5];
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}
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return kvmppc_set_sregs_ivor(vcpu, sregs);
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}
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static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
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union kvmppc_one_reg *val)
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{
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int r = 0;
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switch (id) {
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case KVM_REG_PPC_SPRG9:
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*val = get_reg_val(id, vcpu->arch.sprg9);
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break;
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default:
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r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
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}
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return r;
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}
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static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
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union kvmppc_one_reg *val)
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{
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int r = 0;
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switch (id) {
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case KVM_REG_PPC_SPRG9:
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vcpu->arch.sprg9 = set_reg_val(id, *val);
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break;
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default:
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r = kvmppc_set_one_reg_e500_tlb(vcpu, id, val);
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}
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return r;
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}
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static struct kvm_vcpu *kvmppc_core_vcpu_create_e500mc(struct kvm *kvm,
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unsigned int id)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500;
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struct kvm_vcpu *vcpu;
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int err;
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vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
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if (!vcpu_e500) {
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err = -ENOMEM;
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goto out;
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}
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vcpu = &vcpu_e500->vcpu;
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/* Invalid PIR value -- this LPID dosn't have valid state on any cpu */
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vcpu->arch.oldpir = 0xffffffff;
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err = kvm_vcpu_init(vcpu, kvm, id);
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if (err)
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goto free_vcpu;
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err = kvmppc_e500_tlb_init(vcpu_e500);
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if (err)
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goto uninit_vcpu;
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vcpu->arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
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if (!vcpu->arch.shared) {
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err = -ENOMEM;
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goto uninit_tlb;
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}
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return vcpu;
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uninit_tlb:
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kvmppc_e500_tlb_uninit(vcpu_e500);
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uninit_vcpu:
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kvm_vcpu_uninit(vcpu);
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free_vcpu:
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kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
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out:
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return ERR_PTR(err);
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}
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static void kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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free_page((unsigned long)vcpu->arch.shared);
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kvmppc_e500_tlb_uninit(vcpu_e500);
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kvm_vcpu_uninit(vcpu);
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kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
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}
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static int kvmppc_core_init_vm_e500mc(struct kvm *kvm)
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{
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int lpid;
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lpid = kvmppc_alloc_lpid();
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if (lpid < 0)
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return lpid;
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/*
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* Use two lpids per VM on cores with two threads like e6500. Use
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* even numbers to speedup vcpu lpid computation with consecutive lpids
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* per VM. vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on.
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*/
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if (threads_per_core == 2)
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lpid <<= 1;
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kvm->arch.lpid = lpid;
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return 0;
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}
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static void kvmppc_core_destroy_vm_e500mc(struct kvm *kvm)
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{
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int lpid = kvm->arch.lpid;
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if (threads_per_core == 2)
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lpid >>= 1;
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kvmppc_free_lpid(lpid);
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}
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static struct kvmppc_ops kvm_ops_e500mc = {
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.get_sregs = kvmppc_core_get_sregs_e500mc,
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.set_sregs = kvmppc_core_set_sregs_e500mc,
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.get_one_reg = kvmppc_get_one_reg_e500mc,
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.set_one_reg = kvmppc_set_one_reg_e500mc,
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.vcpu_load = kvmppc_core_vcpu_load_e500mc,
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.vcpu_put = kvmppc_core_vcpu_put_e500mc,
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.vcpu_create = kvmppc_core_vcpu_create_e500mc,
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.vcpu_free = kvmppc_core_vcpu_free_e500mc,
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.mmu_destroy = kvmppc_mmu_destroy_e500,
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.init_vm = kvmppc_core_init_vm_e500mc,
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.destroy_vm = kvmppc_core_destroy_vm_e500mc,
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.emulate_op = kvmppc_core_emulate_op_e500,
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.emulate_mtspr = kvmppc_core_emulate_mtspr_e500,
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.emulate_mfspr = kvmppc_core_emulate_mfspr_e500,
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};
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static int __init kvmppc_e500mc_init(void)
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{
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int r;
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r = kvmppc_booke_init();
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if (r)
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goto err_out;
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/*
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* Use two lpids per VM on dual threaded processors like e6500
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* to workarround the lack of tlb write conditional instruction.
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* Expose half the number of available hardware lpids to the lpid
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* allocator.
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*/
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kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core);
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kvmppc_claim_lpid(0); /* host */
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r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
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if (r)
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goto err_out;
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kvm_ops_e500mc.owner = THIS_MODULE;
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kvmppc_pr_ops = &kvm_ops_e500mc;
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err_out:
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return r;
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}
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static void __exit kvmppc_e500mc_exit(void)
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{
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kvmppc_pr_ops = NULL;
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kvmppc_booke_exit();
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}
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module_init(kvmppc_e500mc_init);
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module_exit(kvmppc_e500mc_exit);
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MODULE_ALIAS_MISCDEV(KVM_MINOR);
|
|
MODULE_ALIAS("devname:kvm");
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