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d54fc90cc9
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
156 lines
3.1 KiB
C
156 lines
3.1 KiB
C
/*
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* ppc64 "iomap" interface implementation.
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*
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* (C) Copyright 2004 Linus Torvalds
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*/
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#include <linux/pci.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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/*
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* Here comes the ppc64 implementation of the IOMAP
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* interfaces.
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*/
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unsigned int ioread8(void __iomem *addr)
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{
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return readb(addr);
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}
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unsigned int ioread16(void __iomem *addr)
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{
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return readw(addr);
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}
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unsigned int ioread16be(void __iomem *addr)
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{
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return readw_be(addr);
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}
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unsigned int ioread32(void __iomem *addr)
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{
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return readl(addr);
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}
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unsigned int ioread32be(void __iomem *addr)
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{
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return readl_be(addr);
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}
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EXPORT_SYMBOL(ioread8);
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EXPORT_SYMBOL(ioread16);
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EXPORT_SYMBOL(ioread16be);
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EXPORT_SYMBOL(ioread32);
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EXPORT_SYMBOL(ioread32be);
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#ifdef __powerpc64__
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u64 ioread64(void __iomem *addr)
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{
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return readq(addr);
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}
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u64 ioread64be(void __iomem *addr)
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{
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return readq_be(addr);
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}
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EXPORT_SYMBOL(ioread64);
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EXPORT_SYMBOL(ioread64be);
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#endif /* __powerpc64__ */
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void iowrite8(u8 val, void __iomem *addr)
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{
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writeb(val, addr);
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}
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void iowrite16(u16 val, void __iomem *addr)
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{
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writew(val, addr);
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}
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void iowrite16be(u16 val, void __iomem *addr)
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{
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writew_be(val, addr);
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}
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void iowrite32(u32 val, void __iomem *addr)
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{
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writel(val, addr);
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}
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void iowrite32be(u32 val, void __iomem *addr)
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{
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writel_be(val, addr);
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}
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EXPORT_SYMBOL(iowrite8);
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EXPORT_SYMBOL(iowrite16);
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EXPORT_SYMBOL(iowrite16be);
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EXPORT_SYMBOL(iowrite32);
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EXPORT_SYMBOL(iowrite32be);
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#ifdef __powerpc64__
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void iowrite64(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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void iowrite64be(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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EXPORT_SYMBOL(iowrite64);
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EXPORT_SYMBOL(iowrite64be);
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#endif /* __powerpc64__ */
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/*
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* These are the "repeat read/write" functions. Note the
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* non-CPU byte order. We do things in "IO byteorder"
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* here.
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*
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* FIXME! We could make these do EEH handling if we really
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* wanted. Not clear if we do.
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*/
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void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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readsb(addr, dst, count);
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}
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void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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readsw(addr, dst, count);
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}
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void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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readsl(addr, dst, count);
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}
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EXPORT_SYMBOL(ioread8_rep);
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EXPORT_SYMBOL(ioread16_rep);
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EXPORT_SYMBOL(ioread32_rep);
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void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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writesb(addr, src, count);
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}
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void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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writesw(addr, src, count);
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}
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void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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writesl(addr, src, count);
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}
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EXPORT_SYMBOL(iowrite8_rep);
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EXPORT_SYMBOL(iowrite16_rep);
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EXPORT_SYMBOL(iowrite32_rep);
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void __iomem *ioport_map(unsigned long port, unsigned int len)
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{
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return (void __iomem *) (port + _IO_BASE);
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}
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void ioport_unmap(void __iomem *addr)
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{
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/* Nothing to do */
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}
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EXPORT_SYMBOL(ioport_map);
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EXPORT_SYMBOL(ioport_unmap);
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#ifdef CONFIG_PCI
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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if (isa_vaddr_is_ioport(addr))
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return;
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if (pcibios_vaddr_is_ioport(addr))
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return;
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iounmap);
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#endif /* CONFIG_PCI */
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