Adrian Hunter 9dd94df75b x86/insn: Add AMX instructions to the x86 instruction decoder ... The x86 instruction decoder is used for both kernel instructions and user space instructions (e.g. uprobes, perf tools Intel PT), so it is good to update it with new instructions. Add AMX instructions to the x86 instruction decoder. Reference: Intel Architecture Instruction Set Extensions and Future Features Programming Reference May 2021 Document Number: 319433-044 Example using perf tools' x86 instruction decoder test: $ INSN='ldtilecfg\|sttilecfg\|tdpbf16ps\|tdpbssd\|' $ INSN+='tdpbsud\|tdpbusd\|'tdpbuud\|tileloadd\|' $ INSN+='tileloaddt1\|tilerelease\|tilestored\|tilezero' $ perf test -v "x86 instruction decoder" |& grep -i $INSN Decoded ok: c4 e2 78 49 04 c8 ldtilecfg (%rax,%rcx,8) Decoded ok: c4 c2 78 49 04 c8 ldtilecfg (%r8,%rcx,8) Decoded ok: c4 e2 79 49 04 c8 sttilecfg (%rax,%rcx,8) Decoded ok: c4 c2 79 49 04 c8 sttilecfg (%r8,%rcx,8) Decoded ok: c4 e2 7a 5c d1 tdpbf16ps %tmm0,%tmm1,%tmm2 Decoded ok: c4 e2 7b 5e d1 tdpbssd %tmm0,%tmm1,%tmm2 Decoded ok: c4 e2 7a 5e d1 tdpbsud %tmm0,%tmm1,%tmm2 Decoded ok: c4 e2 79 5e d1 tdpbusd %tmm0,%tmm1,%tmm2 Decoded ok: c4 e2 78 5e d1 tdpbuud %tmm0,%tmm1,%tmm2 Decoded ok: c4 e2 7b 4b 0c c8 tileloadd (%rax,%rcx,8),%tmm1 Decoded ok: c4 c2 7b 4b 14 c8 tileloadd (%r8,%rcx,8),%tmm2 Decoded ok: c4 e2 79 4b 0c c8 tileloaddt1 (%rax,%rcx,8),%tmm1 Decoded ok: c4 c2 79 4b 14 c8 tileloaddt1 (%r8,%rcx,8),%tmm2 Decoded ok: c4 e2 78 49 c0 tilerelease Decoded ok: c4 e2 7a 4b 0c c8 tilestored %tmm1,(%rax,%rcx,8) Decoded ok: c4 c2 7a 4b 14 c8 tilestored %tmm2,(%r8,%rcx,8) Decoded ok: c4 e2 7b 49 c0 tilezero %tmm0 Decoded ok: c4 e2 7b 49 f8 tilezero %tmm7 Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Link: https://lore.kernel.org/r/20211202095029.2165714-3-adrian.hunter@intel.com		2022-01-23 20:37:46 +01:00
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alpha/include	tools headers uapi: Sync asm-generic/mman-common.h and linux/mman.h	2019-03-28 14:31:56 -03:00
arc/include/uapi/asm	tools arch uapi: Copy missing unistd.h headers for arc, hexagon and riscv	2019-05-02 16:00:20 -04:00
arm/include	tools headers kvm: Sync kvm headers with the kernel sources	2019-12-02 12:54:13 -03:00
arm64/include	tools: arm64: Import sysreg.h	2021-10-17 11:15:51 +01:00
csky/include/uapi/asm	csky: Add support for libdw	2019-05-15 16:36:46 -03:00
h8300/include	License cleanup: add SPDX license identifier to uapi header files with no license	2017-11-02 11:19:54 +01:00
hexagon/include/uapi/asm	tools arch uapi: Copy missing unistd.h headers for arc, hexagon and riscv	2019-05-02 16:00:20 -04:00
ia64/include	ia64: tools: remove duplicate definition of ia64_mf() on ia64	2021-04-16 16:10:37 -07:00
microblaze/include/uapi/asm	License cleanup: add SPDX license identifier to uapi header files with no license	2017-11-02 11:19:54 +01:00
mips/include	perf tools: Copy uapi/asm/perf_regs.h from the kernel for MIPS	2021-06-01 10:07:46 -03:00
parisc/include/uapi/asm	parisc: Add MAP_UNINITIALIZED define	2020-10-15 08:10:39 +02:00
powerpc/include	perf powerpc: Add support to expose instruction and data address registers as part of extended regs	2021-10-25 13:47:42 -03:00
riscv/include/uapi/asm	Replace HTTP links with HTTPS ones: RISC-V	2020-07-30 11:37:40 -07:00
s390/include	tools headers UAPI s390: Sync ptrace.h kernel headers	2021-03-06 16:54:23 -03:00
sh/include	sh: remove sh5 support	2020-06-01 14:48:52 -04:00
sparc/include	tools headers UAPI: Update tools's copy of mman.h headers	2019-07-29 09:02:58 -03:00
x86	x86/insn: Add AMX instructions to the x86 instruction decoder	2022-01-23 20:37:46 +01:00
xtensa/include	tools headers uapi: Sync asm-generic/mman-common.h and linux/mman.h	2019-03-28 14:31:56 -03:00