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b541eaff49
Adding missing indio_dev->dev.of_node references to allow iio consumers to access the device channels. Signed-off-by: Matt Ranostay <mranostay@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
745 lines
18 KiB
C
745 lines
18 KiB
C
/*
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* INA2XX Current and Power Monitors
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*
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* Copyright 2015 Baylibre SAS.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Based on linux/drivers/iio/adc/ad7291.c
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* Copyright 2010-2011 Analog Devices Inc.
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*
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* Based on linux/drivers/hwmon/ina2xx.c
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* Copyright 2012 Lothar Felten <l-felten@ti.com>
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*
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* Licensed under the GPL-2 or later.
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*
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* IIO driver for INA219-220-226-230-231
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*
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* Configurable 7-bit I2C slave address from 0x40 to 0x4F
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*/
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/iio/kfifo_buf.h>
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#include <linux/iio/sysfs.h>
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#include <linux/kthread.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/util_macros.h>
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#include <linux/platform_data/ina2xx.h>
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/* INA2XX registers definition */
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#define INA2XX_CONFIG 0x00
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#define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
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#define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
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#define INA2XX_POWER 0x03 /* readonly */
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#define INA2XX_CURRENT 0x04 /* readonly */
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#define INA2XX_CALIBRATION 0x05
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#define INA226_ALERT_MASK GENMASK(2, 1)
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#define INA266_CVRF BIT(3)
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#define INA2XX_MAX_REGISTERS 8
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/* settings - depend on use case */
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#define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
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#define INA226_CONFIG_DEFAULT 0x4327
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#define INA226_DEFAULT_AVG 4
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#define INA226_DEFAULT_IT 1110
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#define INA2XX_RSHUNT_DEFAULT 10000
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/*
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* bit mask for reading the averaging setting in the configuration register
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* FIXME: use regmap_fields.
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*/
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#define INA2XX_MODE_MASK GENMASK(3, 0)
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#define INA226_AVG_MASK GENMASK(11, 9)
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#define INA226_SHIFT_AVG(val) ((val) << 9)
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/* Integration time for VBus */
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#define INA226_ITB_MASK GENMASK(8, 6)
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#define INA226_SHIFT_ITB(val) ((val) << 6)
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/* Integration time for VShunt */
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#define INA226_ITS_MASK GENMASK(5, 3)
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#define INA226_SHIFT_ITS(val) ((val) << 3)
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/* Cosmetic macro giving the sampling period for a full P=UxI cycle */
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#define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \
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* c->avg)
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static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
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{
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return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
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}
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static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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return (reg != INA2XX_CONFIG);
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}
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static inline bool is_signed_reg(unsigned int reg)
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{
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return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
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}
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static const struct regmap_config ina2xx_regmap_config = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = INA2XX_MAX_REGISTERS,
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.writeable_reg = ina2xx_is_writeable_reg,
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.volatile_reg = ina2xx_is_volatile_reg,
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};
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enum ina2xx_ids { ina219, ina226 };
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struct ina2xx_config {
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u16 config_default;
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int calibration_factor;
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int shunt_div;
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int bus_voltage_shift;
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int bus_voltage_lsb; /* uV */
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int power_lsb; /* uW */
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};
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struct ina2xx_chip_info {
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struct regmap *regmap;
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struct task_struct *task;
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const struct ina2xx_config *config;
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struct mutex state_lock;
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unsigned int shunt_resistor;
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int avg;
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s64 prev_ns; /* track buffer capture time, check for underruns */
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int int_time_vbus; /* Bus voltage integration time uS */
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int int_time_vshunt; /* Shunt voltage integration time uS */
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bool allow_async_readout;
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};
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static const struct ina2xx_config ina2xx_config[] = {
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[ina219] = {
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.config_default = INA219_CONFIG_DEFAULT,
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.calibration_factor = 40960000,
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.shunt_div = 100,
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.bus_voltage_shift = 3,
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.bus_voltage_lsb = 4000,
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.power_lsb = 20000,
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},
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[ina226] = {
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.config_default = INA226_CONFIG_DEFAULT,
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.calibration_factor = 5120000,
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.shunt_div = 400,
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.bus_voltage_shift = 0,
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.bus_voltage_lsb = 1250,
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.power_lsb = 25000,
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},
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};
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static int ina2xx_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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int ret;
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struct ina2xx_chip_info *chip = iio_priv(indio_dev);
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unsigned int regval;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = regmap_read(chip->regmap, chan->address, ®val);
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if (ret)
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return ret;
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if (is_signed_reg(chan->address))
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*val = (s16) regval;
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else
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*val = regval;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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*val = chip->avg;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_INT_TIME:
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*val = 0;
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if (chan->address == INA2XX_SHUNT_VOLTAGE)
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*val2 = chip->int_time_vshunt;
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else
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*val2 = chip->int_time_vbus;
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CHAN_INFO_SAMP_FREQ:
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/*
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* Sample freq is read only, it is a consequence of
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* 1/AVG*(CT_bus+CT_shunt).
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*/
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*val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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switch (chan->address) {
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case INA2XX_SHUNT_VOLTAGE:
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/* processed (mV) = raw/shunt_div */
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*val2 = chip->config->shunt_div;
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*val = 1;
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return IIO_VAL_FRACTIONAL;
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case INA2XX_BUS_VOLTAGE:
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/* processed (mV) = raw*lsb (uV) / (1000 << shift) */
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*val = chip->config->bus_voltage_lsb;
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*val2 = 1000 << chip->config->bus_voltage_shift;
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return IIO_VAL_FRACTIONAL;
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case INA2XX_POWER:
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/* processed (mW) = raw*lsb (uW) / 1000 */
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*val = chip->config->power_lsb;
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*val2 = 1000;
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return IIO_VAL_FRACTIONAL;
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case INA2XX_CURRENT:
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/* processed (mA) = raw (mA) */
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*val = 1;
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return IIO_VAL_INT;
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}
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}
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return -EINVAL;
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}
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/*
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* Available averaging rates for ina226. The indices correspond with
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* the bit values expected by the chip (according to the ina226 datasheet,
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* table 3 AVG bit settings, found at
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* http://www.ti.com/lit/ds/symlink/ina226.pdf.
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*/
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static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
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static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
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unsigned int *config)
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{
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int bits;
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if (val > 1024 || val < 1)
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return -EINVAL;
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bits = find_closest(val, ina226_avg_tab,
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ARRAY_SIZE(ina226_avg_tab));
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chip->avg = ina226_avg_tab[bits];
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*config &= ~INA226_AVG_MASK;
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*config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
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return 0;
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}
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/* Conversion times in uS */
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static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
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2116, 4156, 8244 };
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static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
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unsigned int val_us, unsigned int *config)
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{
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int bits;
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if (val_us > 8244 || val_us < 140)
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return -EINVAL;
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bits = find_closest(val_us, ina226_conv_time_tab,
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ARRAY_SIZE(ina226_conv_time_tab));
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chip->int_time_vbus = ina226_conv_time_tab[bits];
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*config &= ~INA226_ITB_MASK;
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*config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
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return 0;
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}
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static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
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unsigned int val_us, unsigned int *config)
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{
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int bits;
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if (val_us > 8244 || val_us < 140)
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return -EINVAL;
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bits = find_closest(val_us, ina226_conv_time_tab,
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ARRAY_SIZE(ina226_conv_time_tab));
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chip->int_time_vshunt = ina226_conv_time_tab[bits];
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*config &= ~INA226_ITS_MASK;
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*config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
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return 0;
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}
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static int ina2xx_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct ina2xx_chip_info *chip = iio_priv(indio_dev);
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unsigned int config, tmp;
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int ret;
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if (iio_buffer_enabled(indio_dev))
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return -EBUSY;
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mutex_lock(&chip->state_lock);
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ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
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if (ret)
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goto err;
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tmp = config;
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switch (mask) {
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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ret = ina226_set_average(chip, val, &tmp);
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break;
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case IIO_CHAN_INFO_INT_TIME:
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if (chan->address == INA2XX_SHUNT_VOLTAGE)
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ret = ina226_set_int_time_vshunt(chip, val2, &tmp);
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else
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ret = ina226_set_int_time_vbus(chip, val2, &tmp);
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break;
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default:
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ret = -EINVAL;
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}
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if (!ret && (tmp != config))
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ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
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err:
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mutex_unlock(&chip->state_lock);
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return ret;
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}
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static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
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return sprintf(buf, "%d\n", chip->allow_async_readout);
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}
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static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
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bool val;
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int ret;
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ret = strtobool((const char *) buf, &val);
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if (ret)
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return ret;
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chip->allow_async_readout = val;
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return len;
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}
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/*
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* Set current LSB to 1mA, shunt is in uOhms
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* (equation 13 in datasheet). We hardcode a Current_LSB
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* of 1.0 x10-6. The only remaining parameter is RShunt.
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* There is no need to expose the CALIBRATION register
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* to the user for now. But we need to reset this register
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* if the user updates RShunt after driver init, e.g upon
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* reading an EEPROM/Probe-type value.
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*/
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static int ina2xx_set_calibration(struct ina2xx_chip_info *chip)
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{
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u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor,
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chip->shunt_resistor);
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return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval);
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}
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static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
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{
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if (val <= 0 || val > chip->config->calibration_factor)
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return -EINVAL;
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chip->shunt_resistor = val;
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return 0;
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}
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static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
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return sprintf(buf, "%d\n", chip->shunt_resistor);
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}
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static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
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unsigned long val;
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int ret;
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ret = kstrtoul((const char *) buf, 10, &val);
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if (ret)
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return ret;
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ret = set_shunt_resistor(chip, val);
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if (ret)
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return ret;
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/* Update the Calibration register */
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ret = ina2xx_set_calibration(chip);
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if (ret)
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return ret;
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return len;
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}
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#define INA2XX_CHAN(_type, _index, _address) { \
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.type = (_type), \
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.address = (_address), \
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.indexed = 1, \
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.channel = (_index), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
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| BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
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.scan_index = (_index), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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} \
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}
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/*
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* Sampling Freq is a consequence of the integration times of
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* the Voltage channels.
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*/
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#define INA2XX_CHAN_VOLTAGE(_index, _address) { \
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.type = IIO_VOLTAGE, \
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.address = (_address), \
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.indexed = 1, \
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.channel = (_index), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_INT_TIME), \
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.scan_index = (_index), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_LE, \
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} \
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}
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static const struct iio_chan_spec ina2xx_channels[] = {
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INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
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INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
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INA2XX_CHAN(IIO_POWER, 2, INA2XX_POWER),
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INA2XX_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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static int ina2xx_work_buffer(struct iio_dev *indio_dev)
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{
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struct ina2xx_chip_info *chip = iio_priv(indio_dev);
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unsigned short data[8];
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int bit, ret, i = 0;
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s64 time_a, time_b;
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unsigned int alert;
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time_a = iio_get_time_ns(indio_dev);
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/*
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* Because the timer thread and the chip conversion clock
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* are asynchronous, the period difference will eventually
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* result in reading V[k-1] again, or skip V[k] at time Tk.
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* In order to resync the timer with the conversion process
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* we check the ConVersionReadyFlag.
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* On hardware that supports using the ALERT pin to toggle a
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* GPIO a triggered buffer could be used instead.
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* For now, we pay for that extra read of the ALERT register
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*/
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if (!chip->allow_async_readout)
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do {
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ret = regmap_read(chip->regmap, INA226_ALERT_MASK,
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&alert);
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if (ret < 0)
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return ret;
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alert &= INA266_CVRF;
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} while (!alert);
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/*
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* Single register reads: bulk_read will not work with ina226
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* as there is no auto-increment of the address register for
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* data length longer than 16bits.
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*/
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for_each_set_bit(bit, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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unsigned int val;
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ret = regmap_read(chip->regmap,
|
|
INA2XX_SHUNT_VOLTAGE + bit, &val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
data[i++] = val;
|
|
}
|
|
|
|
time_b = iio_get_time_ns(indio_dev);
|
|
|
|
iio_push_to_buffers_with_timestamp(indio_dev,
|
|
(unsigned int *)data, time_a);
|
|
|
|
chip->prev_ns = time_a;
|
|
|
|
return (unsigned long)(time_b - time_a) / 1000;
|
|
};
|
|
|
|
static int ina2xx_capture_thread(void *data)
|
|
{
|
|
struct iio_dev *indio_dev = data;
|
|
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
|
unsigned int sampling_us = SAMPLING_PERIOD(chip);
|
|
int buffer_us;
|
|
|
|
/*
|
|
* Poll a bit faster than the chip internal Fs, in case
|
|
* we wish to sync with the conversion ready flag.
|
|
*/
|
|
if (!chip->allow_async_readout)
|
|
sampling_us -= 200;
|
|
|
|
do {
|
|
buffer_us = ina2xx_work_buffer(indio_dev);
|
|
if (buffer_us < 0)
|
|
return buffer_us;
|
|
|
|
if (sampling_us > buffer_us)
|
|
udelay(sampling_us - buffer_us);
|
|
|
|
} while (!kthread_should_stop());
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
|
|
{
|
|
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
|
unsigned int sampling_us = SAMPLING_PERIOD(chip);
|
|
|
|
dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
|
|
(unsigned int)(*indio_dev->active_scan_mask),
|
|
1000000 / sampling_us, chip->avg);
|
|
|
|
dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us);
|
|
dev_dbg(&indio_dev->dev, "Async readout mode: %d\n",
|
|
chip->allow_async_readout);
|
|
|
|
chip->prev_ns = iio_get_time_ns(indio_dev);
|
|
|
|
chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
|
|
"%s:%d-%uus", indio_dev->name, indio_dev->id,
|
|
sampling_us);
|
|
|
|
return PTR_ERR_OR_ZERO(chip->task);
|
|
}
|
|
|
|
static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
|
|
{
|
|
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
|
|
|
if (chip->task) {
|
|
kthread_stop(chip->task);
|
|
chip->task = NULL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
|
|
.postenable = &ina2xx_buffer_enable,
|
|
.predisable = &ina2xx_buffer_disable,
|
|
};
|
|
|
|
static int ina2xx_debug_reg(struct iio_dev *indio_dev,
|
|
unsigned reg, unsigned writeval, unsigned *readval)
|
|
{
|
|
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
|
|
|
if (!readval)
|
|
return regmap_write(chip->regmap, reg, writeval);
|
|
|
|
return regmap_read(chip->regmap, reg, readval);
|
|
}
|
|
|
|
/* Possible integration times for vshunt and vbus */
|
|
static IIO_CONST_ATTR_INT_TIME_AVAIL("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
|
|
|
|
static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
|
|
ina2xx_allow_async_readout_show,
|
|
ina2xx_allow_async_readout_store, 0);
|
|
|
|
static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
|
|
ina2xx_shunt_resistor_show,
|
|
ina2xx_shunt_resistor_store, 0);
|
|
|
|
static struct attribute *ina2xx_attributes[] = {
|
|
&iio_dev_attr_in_allow_async_readout.dev_attr.attr,
|
|
&iio_const_attr_integration_time_available.dev_attr.attr,
|
|
&iio_dev_attr_in_shunt_resistor.dev_attr.attr,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group ina2xx_attribute_group = {
|
|
.attrs = ina2xx_attributes,
|
|
};
|
|
|
|
static const struct iio_info ina2xx_info = {
|
|
.driver_module = THIS_MODULE,
|
|
.attrs = &ina2xx_attribute_group,
|
|
.read_raw = ina2xx_read_raw,
|
|
.write_raw = ina2xx_write_raw,
|
|
.debugfs_reg_access = ina2xx_debug_reg,
|
|
};
|
|
|
|
/* Initialize the configuration and calibration registers. */
|
|
static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
|
|
{
|
|
int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return ina2xx_set_calibration(chip);
|
|
}
|
|
|
|
static int ina2xx_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct ina2xx_chip_info *chip;
|
|
struct iio_dev *indio_dev;
|
|
struct iio_buffer *buffer;
|
|
unsigned int val;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
chip = iio_priv(indio_dev);
|
|
|
|
/* This is only used for device removal purposes. */
|
|
i2c_set_clientdata(client, indio_dev);
|
|
|
|
chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
|
|
if (IS_ERR(chip->regmap)) {
|
|
dev_err(&client->dev, "failed to allocate register map\n");
|
|
return PTR_ERR(chip->regmap);
|
|
}
|
|
|
|
chip->config = &ina2xx_config[id->driver_data];
|
|
|
|
mutex_init(&chip->state_lock);
|
|
|
|
if (of_property_read_u32(client->dev.of_node,
|
|
"shunt-resistor", &val) < 0) {
|
|
struct ina2xx_platform_data *pdata =
|
|
dev_get_platdata(&client->dev);
|
|
|
|
if (pdata)
|
|
val = pdata->shunt_uohms;
|
|
else
|
|
val = INA2XX_RSHUNT_DEFAULT;
|
|
}
|
|
|
|
ret = set_shunt_resistor(chip, val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Patch the current config register with default. */
|
|
val = chip->config->config_default;
|
|
|
|
if (id->driver_data == ina226) {
|
|
ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
|
|
ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
|
|
ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
|
|
}
|
|
|
|
ret = ina2xx_init(chip, val);
|
|
if (ret) {
|
|
dev_err(&client->dev, "error configuring the device\n");
|
|
return ret;
|
|
}
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
|
|
indio_dev->dev.parent = &client->dev;
|
|
indio_dev->dev.of_node = client->dev.of_node;
|
|
indio_dev->channels = ina2xx_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels);
|
|
indio_dev->name = id->name;
|
|
indio_dev->info = &ina2xx_info;
|
|
indio_dev->setup_ops = &ina2xx_setup_ops;
|
|
|
|
buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
|
|
if (!buffer)
|
|
return -ENOMEM;
|
|
|
|
iio_device_attach_buffer(indio_dev, buffer);
|
|
|
|
return iio_device_register(indio_dev);
|
|
}
|
|
|
|
static int ina2xx_remove(struct i2c_client *client)
|
|
{
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
struct ina2xx_chip_info *chip = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
|
|
/* Powerdown */
|
|
return regmap_update_bits(chip->regmap, INA2XX_CONFIG,
|
|
INA2XX_MODE_MASK, 0);
|
|
}
|
|
|
|
static const struct i2c_device_id ina2xx_id[] = {
|
|
{"ina219", ina219},
|
|
{"ina220", ina219},
|
|
{"ina226", ina226},
|
|
{"ina230", ina226},
|
|
{"ina231", ina226},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ina2xx_id);
|
|
|
|
static struct i2c_driver ina2xx_driver = {
|
|
.driver = {
|
|
.name = KBUILD_MODNAME,
|
|
},
|
|
.probe = ina2xx_probe,
|
|
.remove = ina2xx_remove,
|
|
.id_table = ina2xx_id,
|
|
};
|
|
module_i2c_driver(ina2xx_driver);
|
|
|
|
MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
|
|
MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
|
|
MODULE_LICENSE("GPL v2");
|