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6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
524 lines
16 KiB
C
524 lines
16 KiB
C
/*
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* Optimized memory copy routines.
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*
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* Copyright (C) 2004 Randolph Chung <tausq@debian.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Portions derived from the GNU C Library
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* Copyright (C) 1991, 1997, 2003 Free Software Foundation, Inc.
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*
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* Several strategies are tried to try to get the best performance for various
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* conditions. In the optimal case, we copy 64-bytes in an unrolled loop using
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* fp regs. This is followed by loops that copy 32- or 16-bytes at a time using
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* general registers. Unaligned copies are handled either by aligning the
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* destination and then using shift-and-write method, or in a few cases by
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* falling back to a byte-at-a-time copy.
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*
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* I chose to implement this in C because it is easier to maintain and debug,
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* and in my experiments it appears that the C code generated by gcc (3.3/3.4
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* at the time of writing) is fairly optimal. Unfortunately some of the
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* semantics of the copy routine (exception handling) is difficult to express
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* in C, so we have to play some tricks to get it to work.
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*
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* All the loads and stores are done via explicit asm() code in order to use
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* the right space registers.
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*
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* Testing with various alignments and buffer sizes shows that this code is
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* often >10x faster than a simple byte-at-a-time copy, even for strangely
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* aligned operands. It is interesting to note that the glibc version
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* of memcpy (written in C) is actually quite fast already. This routine is
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* able to beat it by 30-40% for aligned copies because of the loop unrolling,
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* but in some cases the glibc version is still slightly faster. This lends
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* more credibility that gcc can generate very good code as long as we are
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* careful.
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*
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* TODO:
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* - cache prefetching needs more experimentation to get optimal settings
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* - try not to use the post-increment address modifiers; they create additional
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* interlocks
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* - replace byte-copy loops with stybs sequences
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*/
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#ifdef __KERNEL__
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#include <linux/module.h>
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#include <linux/compiler.h>
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#include <asm/uaccess.h>
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#define s_space "%%sr1"
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#define d_space "%%sr2"
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#else
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#include "memcpy.h"
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#define s_space "%%sr0"
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#define d_space "%%sr0"
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#define pa_memcpy new2_copy
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#endif
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DECLARE_PER_CPU(struct exception_data, exception_data);
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#define preserve_branch(label) do { \
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volatile int dummy; \
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/* The following branch is never taken, it's just here to */ \
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/* prevent gcc from optimizing away our exception code. */ \
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if (unlikely(dummy != dummy)) \
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goto label; \
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} while (0)
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#define get_user_space() (segment_eq(get_fs(), KERNEL_DS) ? 0 : mfsp(3))
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#define get_kernel_space() (0)
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#define MERGE(w0, sh_1, w1, sh_2) ({ \
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unsigned int _r; \
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asm volatile ( \
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"mtsar %3\n" \
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"shrpw %1, %2, %%sar, %0\n" \
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: "=r"(_r) \
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: "r"(w0), "r"(w1), "r"(sh_2) \
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); \
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_r; \
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})
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#define THRESHOLD 16
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#ifdef DEBUG_MEMCPY
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#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __FUNCTION__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
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#else
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#define DPRINTF(fmt, args...)
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#endif
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#ifndef __LP64__
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#define EXC_WORD ".word"
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#else
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#define EXC_WORD ".dword"
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#endif
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#define def_load_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
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__asm__ __volatile__ ( \
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"1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n" \
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"\t.section __ex_table,\"aw\"\n" \
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"\t" EXC_WORD "\t1b\n" \
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"\t" EXC_WORD "\t" #_e "\n" \
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"\t.previous\n" \
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: _tt(_t), "+r"(_a) \
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: \
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: "r8")
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#define def_store_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
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__asm__ __volatile__ ( \
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"1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n" \
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"\t.section __ex_table,\"aw\"\n" \
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"\t" EXC_WORD "\t1b\n" \
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"\t" EXC_WORD "\t" #_e "\n" \
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"\t.previous\n" \
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: "+r"(_a) \
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: _tt(_t) \
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: "r8")
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#define ldbma(_s, _a, _t, _e) def_load_ai_insn(ldbs,1,"=r",_s,_a,_t,_e)
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#define stbma(_s, _t, _a, _e) def_store_ai_insn(stbs,1,"r",_s,_a,_t,_e)
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#define ldwma(_s, _a, _t, _e) def_load_ai_insn(ldw,4,"=r",_s,_a,_t,_e)
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#define stwma(_s, _t, _a, _e) def_store_ai_insn(stw,4,"r",_s,_a,_t,_e)
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#define flddma(_s, _a, _t, _e) def_load_ai_insn(fldd,8,"=f",_s,_a,_t,_e)
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#define fstdma(_s, _t, _a, _e) def_store_ai_insn(fstd,8,"f",_s,_a,_t,_e)
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#define def_load_insn(_insn,_tt,_s,_o,_a,_t,_e) \
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__asm__ __volatile__ ( \
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"1:\t" #_insn " " #_o "(" _s ",%1), %0\n" \
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"\t.section __ex_table,\"aw\"\n" \
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"\t" EXC_WORD "\t1b\n" \
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"\t" EXC_WORD "\t" #_e "\n" \
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"\t.previous\n" \
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: _tt(_t) \
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: "r"(_a) \
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: "r8")
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#define def_store_insn(_insn,_tt,_s,_t,_o,_a,_e) \
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__asm__ __volatile__ ( \
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"1:\t" #_insn " %0, " #_o "(" _s ",%1)\n" \
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"\t.section __ex_table,\"aw\"\n" \
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"\t" EXC_WORD "\t1b\n" \
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"\t" EXC_WORD "\t" #_e "\n" \
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"\t.previous\n" \
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: \
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: _tt(_t), "r"(_a) \
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: "r8")
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#define ldw(_s,_o,_a,_t,_e) def_load_insn(ldw,"=r",_s,_o,_a,_t,_e)
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#define stw(_s,_t,_o,_a,_e) def_store_insn(stw,"r",_s,_t,_o,_a,_e)
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#ifdef CONFIG_PREFETCH
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extern inline void prefetch_src(const void *addr)
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{
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__asm__("ldw 0(" s_space ",%0), %%r0" : : "r" (addr));
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}
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extern inline void prefetch_dst(const void *addr)
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{
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__asm__("ldd 0(" d_space ",%0), %%r0" : : "r" (addr));
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}
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#else
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#define prefetch_src(addr)
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#define prefetch_dst(addr)
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#endif
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/* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words
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* per loop. This code is derived from glibc.
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*/
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static inline unsigned long copy_dstaligned(unsigned long dst, unsigned long src, unsigned long len, unsigned long o_dst, unsigned long o_src, unsigned long o_len)
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{
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/* gcc complains that a2 and a3 may be uninitialized, but actually
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* they cannot be. Initialize a2/a3 to shut gcc up.
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*/
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register unsigned int a0, a1, a2 = 0, a3 = 0;
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int sh_1, sh_2;
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struct exception_data *d;
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/* prefetch_src((const void *)src); */
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/* Calculate how to shift a word read at the memory operation
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aligned srcp to make it aligned for copy. */
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sh_1 = 8 * (src % sizeof(unsigned int));
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sh_2 = 8 * sizeof(unsigned int) - sh_1;
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/* Make src aligned by rounding it down. */
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src &= -sizeof(unsigned int);
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switch (len % 4)
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{
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case 2:
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/* a1 = ((unsigned int *) src)[0];
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a2 = ((unsigned int *) src)[1]; */
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ldw(s_space, 0, src, a1, cda_ldw_exc);
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ldw(s_space, 4, src, a2, cda_ldw_exc);
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src -= 1 * sizeof(unsigned int);
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dst -= 3 * sizeof(unsigned int);
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len += 2;
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goto do1;
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case 3:
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/* a0 = ((unsigned int *) src)[0];
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a1 = ((unsigned int *) src)[1]; */
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ldw(s_space, 0, src, a0, cda_ldw_exc);
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ldw(s_space, 4, src, a1, cda_ldw_exc);
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src -= 0 * sizeof(unsigned int);
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dst -= 2 * sizeof(unsigned int);
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len += 1;
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goto do2;
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case 0:
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if (len == 0)
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return 0;
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/* a3 = ((unsigned int *) src)[0];
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a0 = ((unsigned int *) src)[1]; */
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ldw(s_space, 0, src, a3, cda_ldw_exc);
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ldw(s_space, 4, src, a0, cda_ldw_exc);
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src -=-1 * sizeof(unsigned int);
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dst -= 1 * sizeof(unsigned int);
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len += 0;
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goto do3;
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case 1:
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/* a2 = ((unsigned int *) src)[0];
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a3 = ((unsigned int *) src)[1]; */
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ldw(s_space, 0, src, a2, cda_ldw_exc);
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ldw(s_space, 4, src, a3, cda_ldw_exc);
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src -=-2 * sizeof(unsigned int);
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dst -= 0 * sizeof(unsigned int);
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len -= 1;
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if (len == 0)
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goto do0;
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goto do4; /* No-op. */
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}
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do
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{
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/* prefetch_src((const void *)(src + 4 * sizeof(unsigned int))); */
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do4:
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/* a0 = ((unsigned int *) src)[0]; */
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ldw(s_space, 0, src, a0, cda_ldw_exc);
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/* ((unsigned int *) dst)[0] = MERGE (a2, sh_1, a3, sh_2); */
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stw(d_space, MERGE (a2, sh_1, a3, sh_2), 0, dst, cda_stw_exc);
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do3:
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/* a1 = ((unsigned int *) src)[1]; */
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ldw(s_space, 4, src, a1, cda_ldw_exc);
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/* ((unsigned int *) dst)[1] = MERGE (a3, sh_1, a0, sh_2); */
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stw(d_space, MERGE (a3, sh_1, a0, sh_2), 4, dst, cda_stw_exc);
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do2:
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/* a2 = ((unsigned int *) src)[2]; */
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ldw(s_space, 8, src, a2, cda_ldw_exc);
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/* ((unsigned int *) dst)[2] = MERGE (a0, sh_1, a1, sh_2); */
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stw(d_space, MERGE (a0, sh_1, a1, sh_2), 8, dst, cda_stw_exc);
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do1:
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/* a3 = ((unsigned int *) src)[3]; */
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ldw(s_space, 12, src, a3, cda_ldw_exc);
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/* ((unsigned int *) dst)[3] = MERGE (a1, sh_1, a2, sh_2); */
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stw(d_space, MERGE (a1, sh_1, a2, sh_2), 12, dst, cda_stw_exc);
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src += 4 * sizeof(unsigned int);
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dst += 4 * sizeof(unsigned int);
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len -= 4;
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}
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while (len != 0);
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do0:
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/* ((unsigned int *) dst)[0] = MERGE (a2, sh_1, a3, sh_2); */
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stw(d_space, MERGE (a2, sh_1, a3, sh_2), 0, dst, cda_stw_exc);
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preserve_branch(handle_load_error);
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preserve_branch(handle_store_error);
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return 0;
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handle_load_error:
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__asm__ __volatile__ ("cda_ldw_exc:\n");
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d = &__get_cpu_var(exception_data);
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DPRINTF("cda_ldw_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n",
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o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src);
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return o_len * 4 - d->fault_addr + o_src;
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handle_store_error:
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__asm__ __volatile__ ("cda_stw_exc:\n");
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d = &__get_cpu_var(exception_data);
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DPRINTF("cda_stw_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n",
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o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst);
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return o_len * 4 - d->fault_addr + o_dst;
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}
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/* Returns 0 for success, otherwise, returns number of bytes not transferred. */
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unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
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{
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register unsigned long src, dst, t1, t2, t3;
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register unsigned char *pcs, *pcd;
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register unsigned int *pws, *pwd;
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register double *pds, *pdd;
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unsigned long ret = 0;
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unsigned long o_dst, o_src, o_len;
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struct exception_data *d;
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src = (unsigned long)srcp;
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dst = (unsigned long)dstp;
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pcs = (unsigned char *)srcp;
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pcd = (unsigned char *)dstp;
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o_dst = dst; o_src = src; o_len = len;
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/* prefetch_src((const void *)srcp); */
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if (len < THRESHOLD)
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goto byte_copy;
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/* Check alignment */
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t1 = (src ^ dst);
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if (unlikely(t1 & (sizeof(double)-1)))
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goto unaligned_copy;
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/* src and dst have same alignment. */
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/* Copy bytes till we are double-aligned. */
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t2 = src & (sizeof(double) - 1);
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if (unlikely(t2 != 0)) {
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t2 = sizeof(double) - t2;
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while (t2 && len) {
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/* *pcd++ = *pcs++; */
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ldbma(s_space, pcs, t3, pmc_load_exc);
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len--;
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stbma(d_space, t3, pcd, pmc_store_exc);
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t2--;
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}
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}
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pds = (double *)pcs;
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pdd = (double *)pcd;
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#if 0
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/* Copy 8 doubles at a time */
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while (len >= 8*sizeof(double)) {
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register double r1, r2, r3, r4, r5, r6, r7, r8;
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/* prefetch_src((char *)pds + L1_CACHE_BYTES); */
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flddma(s_space, pds, r1, pmc_load_exc);
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flddma(s_space, pds, r2, pmc_load_exc);
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flddma(s_space, pds, r3, pmc_load_exc);
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flddma(s_space, pds, r4, pmc_load_exc);
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fstdma(d_space, r1, pdd, pmc_store_exc);
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fstdma(d_space, r2, pdd, pmc_store_exc);
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fstdma(d_space, r3, pdd, pmc_store_exc);
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fstdma(d_space, r4, pdd, pmc_store_exc);
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#if 0
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if (L1_CACHE_BYTES <= 32)
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prefetch_src((char *)pds + L1_CACHE_BYTES);
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#endif
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flddma(s_space, pds, r5, pmc_load_exc);
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flddma(s_space, pds, r6, pmc_load_exc);
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flddma(s_space, pds, r7, pmc_load_exc);
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flddma(s_space, pds, r8, pmc_load_exc);
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fstdma(d_space, r5, pdd, pmc_store_exc);
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fstdma(d_space, r6, pdd, pmc_store_exc);
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fstdma(d_space, r7, pdd, pmc_store_exc);
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fstdma(d_space, r8, pdd, pmc_store_exc);
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len -= 8*sizeof(double);
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}
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#endif
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pws = (unsigned int *)pds;
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pwd = (unsigned int *)pdd;
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word_copy:
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while (len >= 8*sizeof(unsigned int)) {
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register unsigned int r1,r2,r3,r4,r5,r6,r7,r8;
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/* prefetch_src((char *)pws + L1_CACHE_BYTES); */
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ldwma(s_space, pws, r1, pmc_load_exc);
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ldwma(s_space, pws, r2, pmc_load_exc);
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ldwma(s_space, pws, r3, pmc_load_exc);
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ldwma(s_space, pws, r4, pmc_load_exc);
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stwma(d_space, r1, pwd, pmc_store_exc);
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stwma(d_space, r2, pwd, pmc_store_exc);
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stwma(d_space, r3, pwd, pmc_store_exc);
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stwma(d_space, r4, pwd, pmc_store_exc);
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ldwma(s_space, pws, r5, pmc_load_exc);
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ldwma(s_space, pws, r6, pmc_load_exc);
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ldwma(s_space, pws, r7, pmc_load_exc);
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ldwma(s_space, pws, r8, pmc_load_exc);
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stwma(d_space, r5, pwd, pmc_store_exc);
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stwma(d_space, r6, pwd, pmc_store_exc);
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stwma(d_space, r7, pwd, pmc_store_exc);
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stwma(d_space, r8, pwd, pmc_store_exc);
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len -= 8*sizeof(unsigned int);
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}
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while (len >= 4*sizeof(unsigned int)) {
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register unsigned int r1,r2,r3,r4;
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ldwma(s_space, pws, r1, pmc_load_exc);
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ldwma(s_space, pws, r2, pmc_load_exc);
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ldwma(s_space, pws, r3, pmc_load_exc);
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ldwma(s_space, pws, r4, pmc_load_exc);
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stwma(d_space, r1, pwd, pmc_store_exc);
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stwma(d_space, r2, pwd, pmc_store_exc);
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stwma(d_space, r3, pwd, pmc_store_exc);
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stwma(d_space, r4, pwd, pmc_store_exc);
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len -= 4*sizeof(unsigned int);
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}
|
|
|
|
pcs = (unsigned char *)pws;
|
|
pcd = (unsigned char *)pwd;
|
|
|
|
byte_copy:
|
|
while (len) {
|
|
/* *pcd++ = *pcs++; */
|
|
ldbma(s_space, pcs, t3, pmc_load_exc);
|
|
stbma(d_space, t3, pcd, pmc_store_exc);
|
|
len--;
|
|
}
|
|
|
|
return 0;
|
|
|
|
unaligned_copy:
|
|
/* possibly we are aligned on a word, but not on a double... */
|
|
if (likely(t1 & (sizeof(unsigned int)-1)) == 0) {
|
|
t2 = src & (sizeof(unsigned int) - 1);
|
|
|
|
if (unlikely(t2 != 0)) {
|
|
t2 = sizeof(unsigned int) - t2;
|
|
while (t2) {
|
|
/* *pcd++ = *pcs++; */
|
|
ldbma(s_space, pcs, t3, pmc_load_exc);
|
|
stbma(d_space, t3, pcd, pmc_store_exc);
|
|
len--;
|
|
t2--;
|
|
}
|
|
}
|
|
|
|
pws = (unsigned int *)pcs;
|
|
pwd = (unsigned int *)pcd;
|
|
goto word_copy;
|
|
}
|
|
|
|
/* Align the destination. */
|
|
if (unlikely((dst & (sizeof(unsigned int) - 1)) != 0)) {
|
|
t2 = sizeof(unsigned int) - (dst & (sizeof(unsigned int) - 1));
|
|
while (t2) {
|
|
/* *pcd++ = *pcs++; */
|
|
ldbma(s_space, pcs, t3, pmc_load_exc);
|
|
stbma(d_space, t3, pcd, pmc_store_exc);
|
|
len--;
|
|
t2--;
|
|
}
|
|
dst = (unsigned long)pcd;
|
|
src = (unsigned long)pcs;
|
|
}
|
|
|
|
ret = copy_dstaligned(dst, src, len / sizeof(unsigned int),
|
|
o_dst, o_src, o_len);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pcs += (len & -sizeof(unsigned int));
|
|
pcd += (len & -sizeof(unsigned int));
|
|
len %= sizeof(unsigned int);
|
|
|
|
preserve_branch(handle_load_error);
|
|
preserve_branch(handle_store_error);
|
|
|
|
goto byte_copy;
|
|
|
|
handle_load_error:
|
|
__asm__ __volatile__ ("pmc_load_exc:\n");
|
|
d = &__get_cpu_var(exception_data);
|
|
DPRINTF("pmc_load_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n",
|
|
o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src);
|
|
return o_len - d->fault_addr + o_src;
|
|
|
|
handle_store_error:
|
|
__asm__ __volatile__ ("pmc_store_exc:\n");
|
|
d = &__get_cpu_var(exception_data);
|
|
DPRINTF("pmc_store_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n",
|
|
o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst);
|
|
return o_len - d->fault_addr + o_dst;
|
|
}
|
|
|
|
#ifdef __KERNEL__
|
|
unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len)
|
|
{
|
|
mtsp(get_kernel_space(), 1);
|
|
mtsp(get_user_space(), 2);
|
|
return pa_memcpy((void __force *)dst, src, len);
|
|
}
|
|
|
|
unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len)
|
|
{
|
|
mtsp(get_user_space(), 1);
|
|
mtsp(get_kernel_space(), 2);
|
|
return pa_memcpy(dst, (void __force *)src, len);
|
|
}
|
|
|
|
unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len)
|
|
{
|
|
mtsp(get_user_space(), 1);
|
|
mtsp(get_user_space(), 2);
|
|
return pa_memcpy((void __force *)dst, (void __force *)src, len);
|
|
}
|
|
|
|
|
|
void * memcpy(void * dst,const void *src, size_t count)
|
|
{
|
|
mtsp(get_kernel_space(), 1);
|
|
mtsp(get_kernel_space(), 2);
|
|
pa_memcpy(dst, src, count);
|
|
return dst;
|
|
}
|
|
|
|
EXPORT_SYMBOL(copy_to_user);
|
|
EXPORT_SYMBOL(copy_from_user);
|
|
EXPORT_SYMBOL(copy_in_user);
|
|
EXPORT_SYMBOL(memcpy);
|
|
#endif
|