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Define the following architecture specific funtions for omap2/3/4 .pwrdm_set_mem_onst .pwrdm_set_mem_retst .pwrdm_read_mem_pwrst .pwrdm_read_prev_mem_pwrst .pwrdm_read_mem_retst .pwrdm_clear_all_prev_pwrst .pwrdm_enable_hdwr_sar .pwrdm_disable_hdwr_sar .pwrdm_wait_transition .pwrdm_set_lowpwrstchange Convert the platform-independent framework to call these functions. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: rearranged Makefile changes] Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
112 lines
3.1 KiB
C
112 lines
3.1 KiB
C
/*
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* linux/arch/arm/mach-omap2/powerdomain-common.c
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* Contains common powerdomain framework functions
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*
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* Derived from mach-omap2/powerdomain.c written by Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include "pm.h"
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#include "cm.h"
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#include "cm-regbits-34xx.h"
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#include "cm-regbits-44xx.h"
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#include "prm-regbits-34xx.h"
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#include "prm-regbits-44xx.h"
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#include "powerdomains.h"
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/*
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* OMAP3 and OMAP4 specific register bit initialisations
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* Notice that the names here are not according to each power
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* domain but the bit mapping used applies to all of them
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*/
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/* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */
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#define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK
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#define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK
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#define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK
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#define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK
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#define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK
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/* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */
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#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE_MASK
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#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE_MASK
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#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE_MASK
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#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE_MASK
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#define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK
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/* OMAP3 and OMAP4 Memory Status bits */
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#define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK
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#define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK
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#define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK
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#define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK
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#define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK
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/* Common Internal functions used across OMAP rev's*/
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u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank)
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{
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switch (bank) {
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case 0:
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return OMAP_MEM0_ONSTATE_MASK;
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case 1:
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return OMAP_MEM1_ONSTATE_MASK;
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case 2:
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return OMAP_MEM2_ONSTATE_MASK;
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case 3:
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return OMAP_MEM3_ONSTATE_MASK;
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case 4:
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return OMAP_MEM4_ONSTATE_MASK;
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default:
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WARN_ON(1); /* should never happen */
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return -EEXIST;
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}
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return 0;
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}
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u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank)
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{
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switch (bank) {
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case 0:
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return OMAP_MEM0_RETSTATE_MASK;
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case 1:
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return OMAP_MEM1_RETSTATE_MASK;
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case 2:
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return OMAP_MEM2_RETSTATE_MASK;
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case 3:
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return OMAP_MEM3_RETSTATE_MASK;
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case 4:
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return OMAP_MEM4_RETSTATE_MASK;
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default:
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WARN_ON(1); /* should never happen */
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return -EEXIST;
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}
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return 0;
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}
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u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank)
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{
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switch (bank) {
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case 0:
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return OMAP_MEM0_STATEST_MASK;
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case 1:
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return OMAP_MEM1_STATEST_MASK;
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case 2:
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return OMAP_MEM2_STATEST_MASK;
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case 3:
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return OMAP_MEM3_STATEST_MASK;
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case 4:
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return OMAP_MEM4_STATEST_MASK;
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default:
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WARN_ON(1); /* should never happen */
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return -EEXIST;
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}
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return 0;
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}
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