mirror of
https://github.com/torvalds/linux.git
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c04ee4b113
This reverts commit3b8d7321ed
, which brings back commit428aac8a81
as it should be working for the 3.13-rc1 merge window now that Alan's other fixes are here in the tree already. Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Ming Lei <ming.lei@canonical.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
739 lines
19 KiB
C
739 lines
19 KiB
C
/*
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* Copyright 2005-2009 MontaVista Software, Inc.
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* Copyright 2008,2012 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
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* by Hunter Wu.
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* Power Management support by Dave Liu <daveliu@freescale.com>,
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* Jerry Huang <Chang-Ming.Huang@freescale.com> and
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* Anton Vorontsov <avorontsov@ru.mvista.com>.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/fsl_devices.h>
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#include "ehci-fsl.h"
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/* configure so an HC device and id are always provided */
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/* always called with process context; sleeping is OK */
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/**
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* usb_hcd_fsl_probe - initialize FSL-based HCDs
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* @drvier: Driver to be used for this HCD
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* @pdev: USB Host Controller being probed
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* Context: !in_interrupt()
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*
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* Allocates basic resources for this USB host controller.
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*
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*/
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static int usb_hcd_fsl_probe(const struct hc_driver *driver,
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struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata;
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struct usb_hcd *hcd;
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struct resource *res;
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int irq;
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int retval;
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pr_debug("initializing FSL-SOC USB Controller\n");
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/* Need platform data for setup */
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pdata = dev_get_platdata(&pdev->dev);
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if (!pdata) {
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dev_err(&pdev->dev,
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"No platform data for %s.\n", dev_name(&pdev->dev));
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return -ENODEV;
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}
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/*
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* This is a host mode driver, verify that we're supposed to be
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* in host mode.
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*/
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if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
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(pdata->operating_mode == FSL_USB2_MPH_HOST) ||
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(pdata->operating_mode == FSL_USB2_DR_OTG))) {
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dev_err(&pdev->dev,
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"Non Host Mode configured for %s. Wrong driver linked.\n",
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dev_name(&pdev->dev));
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return -ENODEV;
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}
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!res) {
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dev_err(&pdev->dev,
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"Found HC with no IRQ. Check %s setup!\n",
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dev_name(&pdev->dev));
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return -ENODEV;
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}
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irq = res->start;
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hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
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if (!hcd) {
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retval = -ENOMEM;
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goto err1;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev,
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"Found HC with no register addr. Check %s setup!\n",
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dev_name(&pdev->dev));
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retval = -ENODEV;
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goto err2;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
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driver->description)) {
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dev_dbg(&pdev->dev, "controller already in use\n");
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retval = -EBUSY;
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goto err2;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (hcd->regs == NULL) {
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dev_dbg(&pdev->dev, "error mapping memory\n");
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retval = -EFAULT;
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goto err3;
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}
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pdata->regs = hcd->regs;
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if (pdata->power_budget)
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hcd->power_budget = pdata->power_budget;
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/*
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* do platform specific init: check the clock, grab/config pins, etc.
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*/
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if (pdata->init && pdata->init(pdev)) {
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retval = -ENODEV;
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goto err4;
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}
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/* Enable USB controller, 83xx or 8536 */
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if (pdata->have_sysif_regs)
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setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
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/* Don't need to set host mode here. It will be done by tdi_reset() */
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retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (retval != 0)
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goto err4;
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#ifdef CONFIG_USB_OTG
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if (pdata->operating_mode == FSL_USB2_DR_OTG) {
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
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dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
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hcd, ehci, hcd->phy);
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if (!IS_ERR_OR_NULL(hcd->phy)) {
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retval = otg_set_host(hcd->phy->otg,
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&ehci_to_hcd(ehci)->self);
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if (retval) {
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usb_put_phy(hcd->phy);
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goto err4;
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}
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} else {
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dev_err(&pdev->dev, "can't find phy\n");
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retval = -ENODEV;
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goto err4;
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}
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}
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#endif
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return retval;
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err4:
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iounmap(hcd->regs);
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err3:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err2:
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usb_put_hcd(hcd);
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err1:
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dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
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if (pdata->exit)
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pdata->exit(pdev);
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return retval;
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}
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/* may be called without controller electrically present */
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/* may be called with controller, bus, and devices active */
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/**
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* usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
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* @dev: USB Host Controller being removed
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* Context: !in_interrupt()
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*
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* Reverses the effect of usb_hcd_fsl_probe().
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*
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*/
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static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
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struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
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if (!IS_ERR_OR_NULL(hcd->phy)) {
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otg_set_host(hcd->phy->otg, NULL);
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usb_put_phy(hcd->phy);
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}
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usb_remove_hcd(hcd);
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/*
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* do platform specific un-initialization:
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* release iomux pins, disable clock, etc.
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*/
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if (pdata->exit)
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pdata->exit(pdev);
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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usb_put_hcd(hcd);
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}
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static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
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enum fsl_usb2_phy_modes phy_mode,
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unsigned int port_offset)
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{
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u32 portsc;
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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void __iomem *non_ehci = hcd->regs;
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struct device *dev = hcd->self.controller;
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struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
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if (pdata->controller_ver < 0) {
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dev_warn(hcd->self.controller, "Could not get controller version\n");
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return -ENODEV;
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}
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portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
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portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
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switch (phy_mode) {
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case FSL_USB2_PHY_ULPI:
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if (pdata->have_sysif_regs && pdata->controller_ver) {
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/* controller version 1.6 or above */
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setbits32(non_ehci + FSL_SOC_USB_CTRL,
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ULPI_PHY_CLK_SEL);
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/*
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* Due to controller issue of PHY_CLK_VALID in ULPI
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* mode, we set USB_CTRL_USB_EN before checking
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* PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
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*/
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clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
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UTMI_PHY_EN, USB_CTRL_USB_EN);
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}
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portsc |= PORT_PTS_ULPI;
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break;
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case FSL_USB2_PHY_SERIAL:
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portsc |= PORT_PTS_SERIAL;
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break;
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case FSL_USB2_PHY_UTMI_WIDE:
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portsc |= PORT_PTS_PTW;
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/* fall through */
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case FSL_USB2_PHY_UTMI:
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if (pdata->have_sysif_regs && pdata->controller_ver) {
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/* controller version 1.6 or above */
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setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
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mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
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become stable - 10ms*/
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}
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/* enable UTMI PHY */
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if (pdata->have_sysif_regs)
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setbits32(non_ehci + FSL_SOC_USB_CTRL,
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CTRL_UTMI_PHY_EN);
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portsc |= PORT_PTS_UTMI;
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break;
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case FSL_USB2_PHY_NONE:
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break;
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}
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if (pdata->have_sysif_regs && pdata->controller_ver &&
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(phy_mode == FSL_USB2_PHY_ULPI)) {
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/* check PHY_CLK_VALID to get phy clk valid */
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if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
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PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
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printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
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return -EINVAL;
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}
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}
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ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
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if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
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setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
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return 0;
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}
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static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
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{
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struct usb_hcd *hcd = ehci_to_hcd(ehci);
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struct fsl_usb2_platform_data *pdata;
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void __iomem *non_ehci = hcd->regs;
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pdata = dev_get_platdata(hcd->self.controller);
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if (pdata->have_sysif_regs) {
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/*
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* Turn on cache snooping hardware, since some PowerPC platforms
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* wholly rely on hardware to deal with cache coherent
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*/
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/* Setup Snooping for all the 4GB space */
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/* SNOOP1 starts from 0x0, size 2G */
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out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
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/* SNOOP2 starts from 0x80000000, size 2G */
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out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
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}
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if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
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(pdata->operating_mode == FSL_USB2_DR_OTG))
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if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
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return -EINVAL;
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if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
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unsigned int chip, rev, svr;
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svr = mfspr(SPRN_SVR);
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chip = svr >> 16;
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rev = (svr >> 4) & 0xf;
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/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
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if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
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ehci->has_fsl_port_bug = 1;
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if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
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if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
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return -EINVAL;
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if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
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if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
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return -EINVAL;
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}
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if (pdata->have_sysif_regs) {
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#ifdef CONFIG_FSL_SOC_BOOKE
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out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
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out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
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#else
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out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
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out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
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#endif
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out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
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}
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return 0;
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}
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/* called after powerup, by probe or system-pm "wakeup" */
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static int ehci_fsl_reinit(struct ehci_hcd *ehci)
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{
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if (ehci_fsl_usb_setup(ehci))
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return -EINVAL;
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return 0;
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}
|
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|
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/* called during probe() after chip reset completes */
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static int ehci_fsl_setup(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int retval;
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struct fsl_usb2_platform_data *pdata;
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struct device *dev;
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dev = hcd->self.controller;
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pdata = dev_get_platdata(hcd->self.controller);
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ehci->big_endian_desc = pdata->big_endian_desc;
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ehci->big_endian_mmio = pdata->big_endian_mmio;
|
|
|
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/* EHCI registers start at offset 0x100 */
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ehci->caps = hcd->regs + 0x100;
|
|
|
|
#ifdef CONFIG_PPC_83xx
|
|
/*
|
|
* Deal with MPC834X that need port power to be cycled after the power
|
|
* fault condition is removed. Otherwise the state machine does not
|
|
* reflect PORTSC[CSC] correctly.
|
|
*/
|
|
ehci->need_oc_pp_cycle = 1;
|
|
#endif
|
|
|
|
hcd->has_tt = 1;
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|
|
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retval = ehci_setup(hcd);
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if (retval)
|
|
return retval;
|
|
|
|
if (of_device_is_compatible(dev->parent->of_node,
|
|
"fsl,mpc5121-usb2-dr")) {
|
|
/*
|
|
* set SBUSCFG:AHBBRST so that control msgs don't
|
|
* fail when doing heavy PATA writes.
|
|
*/
|
|
ehci_writel(ehci, SBUSCFG_INCR8,
|
|
hcd->regs + FSL_SOC_USB_SBUSCFG);
|
|
}
|
|
|
|
retval = ehci_fsl_reinit(ehci);
|
|
return retval;
|
|
}
|
|
|
|
struct ehci_fsl {
|
|
struct ehci_hcd ehci;
|
|
|
|
#ifdef CONFIG_PM
|
|
/* Saved USB PHY settings, need to restore after deep sleep. */
|
|
u32 usb_ctrl;
|
|
#endif
|
|
};
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
#ifdef CONFIG_PPC_MPC512x
|
|
static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
|
|
{
|
|
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
|
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
|
struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
|
|
u32 tmp;
|
|
|
|
#if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
|
|
u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
|
|
mode &= USBMODE_CM_MASK;
|
|
tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
|
|
|
|
dev_dbg(dev, "suspend=%d already_suspended=%d "
|
|
"mode=%d usbcmd %08x\n", pdata->suspended,
|
|
pdata->already_suspended, mode, tmp);
|
|
#endif
|
|
|
|
/*
|
|
* If the controller is already suspended, then this must be a
|
|
* PM suspend. Remember this fact, so that we will leave the
|
|
* controller suspended at PM resume time.
|
|
*/
|
|
if (pdata->suspended) {
|
|
dev_dbg(dev, "already suspended, leaving early\n");
|
|
pdata->already_suspended = 1;
|
|
return 0;
|
|
}
|
|
|
|
dev_dbg(dev, "suspending...\n");
|
|
|
|
ehci->rh_state = EHCI_RH_SUSPENDED;
|
|
dev->power.power_state = PMSG_SUSPEND;
|
|
|
|
/* ignore non-host interrupts */
|
|
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
|
|
|
|
/* stop the controller */
|
|
tmp = ehci_readl(ehci, &ehci->regs->command);
|
|
tmp &= ~CMD_RUN;
|
|
ehci_writel(ehci, tmp, &ehci->regs->command);
|
|
|
|
/* save EHCI registers */
|
|
pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
|
|
pdata->pm_command &= ~CMD_RUN;
|
|
pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
|
|
pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
|
|
pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
|
|
pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
|
|
pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
|
|
pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
|
|
pdata->pm_configured_flag =
|
|
ehci_readl(ehci, &ehci->regs->configured_flag);
|
|
pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
|
|
pdata->pm_usbgenctrl = ehci_readl(ehci,
|
|
hcd->regs + FSL_SOC_USB_USBGENCTRL);
|
|
|
|
/* clear the W1C bits */
|
|
pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
|
|
|
|
pdata->suspended = 1;
|
|
|
|
/* clear PP to cut power to the port */
|
|
tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
|
|
tmp &= ~PORT_POWER;
|
|
ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
|
|
{
|
|
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
|
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
|
struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
|
|
u32 tmp;
|
|
|
|
dev_dbg(dev, "suspend=%d already_suspended=%d\n",
|
|
pdata->suspended, pdata->already_suspended);
|
|
|
|
/*
|
|
* If the controller was already suspended at suspend time,
|
|
* then don't resume it now.
|
|
*/
|
|
if (pdata->already_suspended) {
|
|
dev_dbg(dev, "already suspended, leaving early\n");
|
|
pdata->already_suspended = 0;
|
|
return 0;
|
|
}
|
|
|
|
if (!pdata->suspended) {
|
|
dev_dbg(dev, "not suspended, leaving early\n");
|
|
return 0;
|
|
}
|
|
|
|
pdata->suspended = 0;
|
|
|
|
dev_dbg(dev, "resuming...\n");
|
|
|
|
/* set host mode */
|
|
tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
|
|
ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
|
|
|
|
ehci_writel(ehci, pdata->pm_usbgenctrl,
|
|
hcd->regs + FSL_SOC_USB_USBGENCTRL);
|
|
ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
|
|
hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
|
|
|
|
ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
|
|
|
|
/* restore EHCI registers */
|
|
ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
|
|
ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
|
|
ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
|
|
ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
|
|
ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
|
|
ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
|
|
ehci_writel(ehci, pdata->pm_configured_flag,
|
|
&ehci->regs->configured_flag);
|
|
ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
|
|
|
|
set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
|
|
ehci->rh_state = EHCI_RH_RUNNING;
|
|
dev->power.power_state = PMSG_ON;
|
|
|
|
tmp = ehci_readl(ehci, &ehci->regs->command);
|
|
tmp |= CMD_RUN;
|
|
ehci_writel(ehci, tmp, &ehci->regs->command);
|
|
|
|
usb_hcd_resume_root_hub(hcd);
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PPC_MPC512x */
|
|
|
|
static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
|
|
{
|
|
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
|
|
|
return container_of(ehci, struct ehci_fsl, ehci);
|
|
}
|
|
|
|
static int ehci_fsl_drv_suspend(struct device *dev)
|
|
{
|
|
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
|
struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
|
|
void __iomem *non_ehci = hcd->regs;
|
|
|
|
if (of_device_is_compatible(dev->parent->of_node,
|
|
"fsl,mpc5121-usb2-dr")) {
|
|
return ehci_fsl_mpc512x_drv_suspend(dev);
|
|
}
|
|
|
|
ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
|
|
device_may_wakeup(dev));
|
|
if (!fsl_deep_sleep())
|
|
return 0;
|
|
|
|
ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
|
|
return 0;
|
|
}
|
|
|
|
static int ehci_fsl_drv_resume(struct device *dev)
|
|
{
|
|
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
|
struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
|
|
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
|
void __iomem *non_ehci = hcd->regs;
|
|
|
|
if (of_device_is_compatible(dev->parent->of_node,
|
|
"fsl,mpc5121-usb2-dr")) {
|
|
return ehci_fsl_mpc512x_drv_resume(dev);
|
|
}
|
|
|
|
ehci_prepare_ports_for_controller_resume(ehci);
|
|
if (!fsl_deep_sleep())
|
|
return 0;
|
|
|
|
usb_root_hub_lost_power(hcd->self.root_hub);
|
|
|
|
/* Restore USB PHY settings and enable the controller. */
|
|
out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
|
|
|
|
ehci_reset(ehci);
|
|
ehci_fsl_reinit(ehci);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ehci_fsl_drv_restore(struct device *dev)
|
|
{
|
|
struct usb_hcd *hcd = dev_get_drvdata(dev);
|
|
|
|
usb_root_hub_lost_power(hcd->self.root_hub);
|
|
return 0;
|
|
}
|
|
|
|
static struct dev_pm_ops ehci_fsl_pm_ops = {
|
|
.suspend = ehci_fsl_drv_suspend,
|
|
.resume = ehci_fsl_drv_resume,
|
|
.restore = ehci_fsl_drv_restore,
|
|
};
|
|
|
|
#define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
|
|
#else
|
|
#define EHCI_FSL_PM_OPS NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
#ifdef CONFIG_USB_OTG
|
|
static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
|
|
{
|
|
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
|
u32 status;
|
|
|
|
if (!port)
|
|
return -EINVAL;
|
|
|
|
port--;
|
|
|
|
/* start port reset before HNP protocol time out */
|
|
status = readl(&ehci->regs->port_status[port]);
|
|
if (!(status & PORT_CONNECT))
|
|
return -ENODEV;
|
|
|
|
/* khubd will finish the reset later */
|
|
if (ehci_is_TDI(ehci)) {
|
|
writel(PORT_RESET |
|
|
(status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
|
|
&ehci->regs->port_status[port]);
|
|
} else {
|
|
writel(PORT_RESET, &ehci->regs->port_status[port]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define ehci_start_port_reset NULL
|
|
#endif /* CONFIG_USB_OTG */
|
|
|
|
|
|
static const struct hc_driver ehci_fsl_hc_driver = {
|
|
.description = hcd_name,
|
|
.product_desc = "Freescale On-Chip EHCI Host Controller",
|
|
.hcd_priv_size = sizeof(struct ehci_fsl),
|
|
|
|
/*
|
|
* generic hardware linkage
|
|
*/
|
|
.irq = ehci_irq,
|
|
.flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
|
|
|
|
/*
|
|
* basic lifecycle operations
|
|
*/
|
|
.reset = ehci_fsl_setup,
|
|
.start = ehci_run,
|
|
.stop = ehci_stop,
|
|
.shutdown = ehci_shutdown,
|
|
|
|
/*
|
|
* managing i/o requests and associated device resources
|
|
*/
|
|
.urb_enqueue = ehci_urb_enqueue,
|
|
.urb_dequeue = ehci_urb_dequeue,
|
|
.endpoint_disable = ehci_endpoint_disable,
|
|
.endpoint_reset = ehci_endpoint_reset,
|
|
|
|
/*
|
|
* scheduling support
|
|
*/
|
|
.get_frame_number = ehci_get_frame,
|
|
|
|
/*
|
|
* root hub support
|
|
*/
|
|
.hub_status_data = ehci_hub_status_data,
|
|
.hub_control = ehci_hub_control,
|
|
.bus_suspend = ehci_bus_suspend,
|
|
.bus_resume = ehci_bus_resume,
|
|
.start_port_reset = ehci_start_port_reset,
|
|
.relinquish_port = ehci_relinquish_port,
|
|
.port_handed_over = ehci_port_handed_over,
|
|
|
|
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
|
|
};
|
|
|
|
static int ehci_fsl_drv_probe(struct platform_device *pdev)
|
|
{
|
|
if (usb_disabled())
|
|
return -ENODEV;
|
|
|
|
/* FIXME we only want one one probe() not two */
|
|
return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
|
|
}
|
|
|
|
static int ehci_fsl_drv_remove(struct platform_device *pdev)
|
|
{
|
|
struct usb_hcd *hcd = platform_get_drvdata(pdev);
|
|
|
|
/* FIXME we only want one one remove() not two */
|
|
usb_hcd_fsl_remove(hcd, pdev);
|
|
return 0;
|
|
}
|
|
|
|
MODULE_ALIAS("platform:fsl-ehci");
|
|
|
|
static struct platform_driver ehci_fsl_driver = {
|
|
.probe = ehci_fsl_drv_probe,
|
|
.remove = ehci_fsl_drv_remove,
|
|
.shutdown = usb_hcd_platform_shutdown,
|
|
.driver = {
|
|
.name = "fsl-ehci",
|
|
.owner = THIS_MODULE,
|
|
.pm = EHCI_FSL_PM_OPS,
|
|
},
|
|
};
|