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25df73d933
Make it explicit that ATA host templates are not modified. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> (for DWC AHCI SATA) Reviewed-by: John Garry <john.g.garry@oracle.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> (for Tegra) Cc: Christoph Hellwig <hch@lst.de> Cc: Ming Lei <ming.lei@redhat.com> Cc: Hannes Reinecke <hare@suse.de> Cc: John Garry <john.g.garry@oracle.com> Cc: Mike Christie <michael.christie@oracle.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20230322195515.1267197-5-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
174 lines
4.5 KiB
C
174 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* pata_cypress.c - Cypress PATA for new ATA layer
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* (C) 2006 Red Hat Inc
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* Alan Cox
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*
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* Based heavily on
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* linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_cypress"
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#define DRV_VERSION "0.1.5"
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/* here are the offset definitions for the registers */
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enum {
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CY82_IDE_CMDREG = 0x04,
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CY82_IDE_ADDRSETUP = 0x48,
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CY82_IDE_MASTER_IOR = 0x4C,
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CY82_IDE_MASTER_IOW = 0x4D,
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CY82_IDE_SLAVE_IOR = 0x4E,
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CY82_IDE_SLAVE_IOW = 0x4F,
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CY82_IDE_MASTER_8BIT = 0x50,
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CY82_IDE_SLAVE_8BIT = 0x51,
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CY82_INDEX_PORT = 0x22,
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CY82_DATA_PORT = 0x23,
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CY82_INDEX_CTRLREG1 = 0x01,
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CY82_INDEX_CHANNEL0 = 0x30,
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CY82_INDEX_CHANNEL1 = 0x31,
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CY82_INDEX_TIMEOUT = 0x32
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};
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static bool enable_dma = true;
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module_param(enable_dma, bool, 0);
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MODULE_PARM_DESC(enable_dma, "Enable bus master DMA operations");
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/**
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* cy82c693_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Called to do the PIO mode setup.
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*/
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static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct ata_timing t;
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const unsigned long T = 1000000 / 33;
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short time_16, time_8;
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u32 addr;
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if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
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ata_dev_err(adev, DRV_NAME ": mome computation failed.\n");
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return;
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}
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time_16 = clamp_val(t.recover - 1, 0, 15) |
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(clamp_val(t.active - 1, 0, 15) << 4);
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time_8 = clamp_val(t.act8b - 1, 0, 15) |
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(clamp_val(t.rec8b - 1, 0, 15) << 4);
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if (adev->devno == 0) {
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pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
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addr &= ~0x0F; /* Mask bits */
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addr |= clamp_val(t.setup - 1, 0, 15);
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pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
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pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
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} else {
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pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
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addr &= ~0xF0; /* Mask bits */
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addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
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pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
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pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
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}
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}
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/**
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* cy82c693_set_dmamode - set initial DMA mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Called to do the DMA mode setup.
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*/
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static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
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/* Be afraid, be very afraid. Magic registers in low I/O space */
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outb(reg, 0x22);
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outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
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/* 0x50 gives the best behaviour on the Alpha's using this chip */
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outb(CY82_INDEX_TIMEOUT, 0x22);
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outb(0x50, 0x23);
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}
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static const struct scsi_host_template cy82c693_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations cy82c693_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.cable_detect = ata_cable_40wire,
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.set_piomode = cy82c693_set_piomode,
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.set_dmamode = cy82c693_set_dmamode,
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};
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static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = ATA_PIO4,
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.port_ops = &cy82c693_port_ops
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};
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const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
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if (enable_dma)
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info.mwdma_mask = ATA_MWDMA2;
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/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
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For the moment we don't handle the secondary. FIXME */
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if (PCI_FUNC(pdev->devfn) != 1)
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return -ENODEV;
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return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
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}
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static const struct pci_device_id cy82c693[] = {
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{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
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{ },
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};
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static struct pci_driver cy82c693_pci_driver = {
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.name = DRV_NAME,
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.id_table = cy82c693,
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.probe = cy82c693_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM_SLEEP
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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module_pci_driver(cy82c693_pci_driver);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, cy82c693);
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MODULE_VERSION(DRV_VERSION);
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