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The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its reset is controlled via a separate reset controller. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
43 lines
1.2 KiB
Plaintext
43 lines
1.2 KiB
Plaintext
Allwinner Sony/Philips Digital Interface Format (S/PDIF) Controller
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The Allwinner S/PDIF audio block is a transceiver that allows the
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processor to receive and transmit digital audio via an coaxial cable or
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a fibre cable.
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For now only playback is supported.
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Required properties:
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- compatible : should be one of the following:
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- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
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- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
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- reg : Offset and length of the register set for the device.
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- interrupts : Contains the spdif interrupt.
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- dmas : Generic dma devicetree binding as described in
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Documentation/devicetree/bindings/dma/dma.txt.
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- dma-names : Two dmas have to be defined, "tx" and "rx".
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- clocks : Contains an entry for each entry in clock-names.
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- clock-names : Includes the following entries:
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"apb" clock for the spdif bus.
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"spdif" clock for spdif controller.
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- resets : reset specifier for the ahb reset (A31 and newer only)
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Example:
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spdif: spdif@01c21000 {
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compatible = "allwinner,sun4i-a10-spdif";
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reg = <0x01c21000 0x40>;
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interrupts = <13>;
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clocks = <&apb0_gates 1>, <&spdif_clk>;
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clock-names = "apb", "spdif";
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dmas = <&dma 0 2>, <&dma 0 2>;
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dma-names = "rx", "tx";
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status = "okay";
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};
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