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The AD5338R is a 10-bit DAC with 2 outputs and an internal 2.5V reference (enabled by default). The register configuration is nearly identical to the AD5696R DAC that's already supported by this driver, with the channel selection bits being the only thing different. Signed-off-by: Michael Auchter <michael.auchter@ni.com> Link: https://lore.kernel.org/r/20200924195215.49443-1-michael.auchter@ni.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
545 lines
13 KiB
C
545 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* AD5686R, AD5685R, AD5684R Digital to analog converters driver
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*
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* Copyright 2011 Analog Devices Inc.
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*/
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#include <linux/interrupt.h>
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#include <linux/fs.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include "ad5686.h"
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static const char * const ad5686_powerdown_modes[] = {
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"1kohm_to_gnd",
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"100kohm_to_gnd",
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"three_state"
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};
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static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
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}
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static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int mode)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
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st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
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return 0;
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}
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static const struct iio_enum ad5686_powerdown_mode_enum = {
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.items = ad5686_powerdown_modes,
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.num_items = ARRAY_SIZE(ad5686_powerdown_modes),
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.get = ad5686_get_powerdown_mode,
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.set = ad5686_set_powerdown_mode,
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};
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static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, char *buf)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
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(0x3 << (chan->channel * 2))));
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}
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static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf,
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size_t len)
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{
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bool readin;
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int ret;
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struct ad5686_state *st = iio_priv(indio_dev);
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unsigned int val, ref_bit_msk;
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u8 shift, address = 0;
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ret = strtobool(buf, &readin);
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if (ret)
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return ret;
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if (readin)
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st->pwr_down_mask |= (0x3 << (chan->channel * 2));
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else
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st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
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switch (st->chip_info->regmap_type) {
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case AD5310_REGMAP:
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shift = 9;
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ref_bit_msk = AD5310_REF_BIT_MSK;
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break;
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case AD5683_REGMAP:
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shift = 13;
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ref_bit_msk = AD5683_REF_BIT_MSK;
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break;
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case AD5686_REGMAP:
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shift = 0;
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ref_bit_msk = 0;
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/* AD5674R/AD5679R have 16 channels and 2 powerdown registers */
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if (chan->channel > 0x7)
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address = 0x8;
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break;
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case AD5693_REGMAP:
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shift = 13;
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ref_bit_msk = AD5693_REF_BIT_MSK;
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break;
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default:
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return -EINVAL;
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}
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val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
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if (!st->use_internal_vref)
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val |= ref_bit_msk;
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ret = st->write(st, AD5686_CMD_POWERDOWN_DAC,
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address, val >> (address * 2));
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return ret ? ret : len;
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}
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static int ad5686_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&st->lock);
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ret = st->read(st, chan->address);
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mutex_unlock(&st->lock);
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if (ret < 0)
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return ret;
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*val = (ret >> chan->scan_type.shift) &
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GENMASK(chan->scan_type.realbits - 1, 0);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = st->vref_mv;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static int ad5686_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (val > (1 << chan->scan_type.realbits) || val < 0)
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return -EINVAL;
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mutex_lock(&st->lock);
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ret = st->write(st,
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AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
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chan->address,
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val << chan->scan_type.shift);
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mutex_unlock(&st->lock);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static const struct iio_info ad5686_info = {
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.read_raw = ad5686_read_raw,
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.write_raw = ad5686_write_raw,
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};
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static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
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{
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.name = "powerdown",
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.read = ad5686_read_dac_powerdown,
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.write = ad5686_write_dac_powerdown,
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.shared = IIO_SEPARATE,
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},
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IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
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IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
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{ },
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};
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#define AD5868_CHANNEL(chan, addr, bits, _shift) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.output = 1, \
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.channel = chan, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
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.address = addr, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.shift = (_shift), \
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}, \
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.ext_info = ad5686_ext_info, \
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}
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#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
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static const struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 0, bits, _shift), \
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}
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#define DECLARE_AD5338_CHANNELS(name, bits, _shift) \
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static const struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 1, bits, _shift), \
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AD5868_CHANNEL(1, 8, bits, _shift), \
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}
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#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
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static const struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 1, bits, _shift), \
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AD5868_CHANNEL(1, 2, bits, _shift), \
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AD5868_CHANNEL(2, 4, bits, _shift), \
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AD5868_CHANNEL(3, 8, bits, _shift), \
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}
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#define DECLARE_AD5676_CHANNELS(name, bits, _shift) \
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static const struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 0, bits, _shift), \
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AD5868_CHANNEL(1, 1, bits, _shift), \
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AD5868_CHANNEL(2, 2, bits, _shift), \
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AD5868_CHANNEL(3, 3, bits, _shift), \
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AD5868_CHANNEL(4, 4, bits, _shift), \
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AD5868_CHANNEL(5, 5, bits, _shift), \
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AD5868_CHANNEL(6, 6, bits, _shift), \
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AD5868_CHANNEL(7, 7, bits, _shift), \
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}
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#define DECLARE_AD5679_CHANNELS(name, bits, _shift) \
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static const struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 0, bits, _shift), \
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AD5868_CHANNEL(1, 1, bits, _shift), \
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AD5868_CHANNEL(2, 2, bits, _shift), \
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AD5868_CHANNEL(3, 3, bits, _shift), \
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AD5868_CHANNEL(4, 4, bits, _shift), \
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AD5868_CHANNEL(5, 5, bits, _shift), \
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AD5868_CHANNEL(6, 6, bits, _shift), \
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AD5868_CHANNEL(7, 7, bits, _shift), \
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AD5868_CHANNEL(8, 8, bits, _shift), \
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AD5868_CHANNEL(9, 9, bits, _shift), \
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AD5868_CHANNEL(10, 10, bits, _shift), \
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AD5868_CHANNEL(11, 11, bits, _shift), \
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AD5868_CHANNEL(12, 12, bits, _shift), \
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AD5868_CHANNEL(13, 13, bits, _shift), \
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AD5868_CHANNEL(14, 14, bits, _shift), \
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AD5868_CHANNEL(15, 15, bits, _shift), \
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}
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DECLARE_AD5693_CHANNELS(ad5310r_channels, 10, 2);
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DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6);
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DECLARE_AD5338_CHANNELS(ad5338r_channels, 10, 6);
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DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4);
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DECLARE_AD5679_CHANNELS(ad5674r_channels, 12, 4);
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DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
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DECLARE_AD5679_CHANNELS(ad5679r_channels, 16, 0);
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DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
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DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
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DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
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DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
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DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
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DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
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static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
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[ID_AD5310R] = {
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.channels = ad5310r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5310_REGMAP,
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},
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[ID_AD5311R] = {
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.channels = ad5311r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5338R] = {
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.channels = ad5338r_channels,
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.int_vref_mv = 2500,
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.num_channels = 2,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5671R] = {
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.channels = ad5672_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5672R] = {
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.channels = ad5672_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5674R] = {
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.channels = ad5674r_channels,
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.int_vref_mv = 2500,
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.num_channels = 16,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5675R] = {
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.channels = ad5676_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5676] = {
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.channels = ad5676_channels,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5676R] = {
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.channels = ad5676_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5679R] = {
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.channels = ad5679r_channels,
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.int_vref_mv = 2500,
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.num_channels = 16,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5681R] = {
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.channels = ad5691r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5683_REGMAP,
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},
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[ID_AD5682R] = {
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.channels = ad5692r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5683_REGMAP,
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},
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[ID_AD5683] = {
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.channels = ad5693_channels,
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.num_channels = 1,
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.regmap_type = AD5683_REGMAP,
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},
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[ID_AD5683R] = {
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.channels = ad5693_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5683_REGMAP,
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},
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[ID_AD5684] = {
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.channels = ad5684_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5684R] = {
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.channels = ad5684_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5685R] = {
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.channels = ad5685r_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5686] = {
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.channels = ad5686_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5686R] = {
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.channels = ad5686_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5691R] = {
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.channels = ad5691r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5692R] = {
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.channels = ad5692r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5693] = {
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.channels = ad5693_channels,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5693R] = {
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.channels = ad5693_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5694] = {
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.channels = ad5684_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5694R] = {
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.channels = ad5684_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5696] = {
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.channels = ad5686_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5696R] = {
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.channels = ad5686_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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};
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int ad5686_probe(struct device *dev,
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enum ad5686_supported_device_ids chip_type,
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const char *name, ad5686_write_func write,
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ad5686_read_func read)
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{
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struct ad5686_state *st;
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struct iio_dev *indio_dev;
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unsigned int val, ref_bit_msk;
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u8 cmd;
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int ret, i, voltage_uv = 0;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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dev_set_drvdata(dev, indio_dev);
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st->dev = dev;
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st->write = write;
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st->read = read;
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st->reg = devm_regulator_get_optional(dev, "vcc");
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if (!IS_ERR(st->reg)) {
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ret = regulator_enable(st->reg);
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if (ret)
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return ret;
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ret = regulator_get_voltage(st->reg);
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if (ret < 0)
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goto error_disable_reg;
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voltage_uv = ret;
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}
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st->chip_info = &ad5686_chip_info_tbl[chip_type];
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if (voltage_uv)
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st->vref_mv = voltage_uv / 1000;
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else
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st->vref_mv = st->chip_info->int_vref_mv;
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/* Set all the power down mode for all channels to 1K pulldown */
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for (i = 0; i < st->chip_info->num_channels; i++)
|
|
st->pwr_down_mode |= (0x01 << (i * 2));
|
|
|
|
indio_dev->name = name;
|
|
indio_dev->info = &ad5686_info;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = st->chip_info->channels;
|
|
indio_dev->num_channels = st->chip_info->num_channels;
|
|
|
|
mutex_init(&st->lock);
|
|
|
|
switch (st->chip_info->regmap_type) {
|
|
case AD5310_REGMAP:
|
|
cmd = AD5686_CMD_CONTROL_REG;
|
|
ref_bit_msk = AD5310_REF_BIT_MSK;
|
|
st->use_internal_vref = !voltage_uv;
|
|
break;
|
|
case AD5683_REGMAP:
|
|
cmd = AD5686_CMD_CONTROL_REG;
|
|
ref_bit_msk = AD5683_REF_BIT_MSK;
|
|
st->use_internal_vref = !voltage_uv;
|
|
break;
|
|
case AD5686_REGMAP:
|
|
cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
|
|
ref_bit_msk = 0;
|
|
break;
|
|
case AD5693_REGMAP:
|
|
cmd = AD5686_CMD_CONTROL_REG;
|
|
ref_bit_msk = AD5693_REF_BIT_MSK;
|
|
st->use_internal_vref = !voltage_uv;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
goto error_disable_reg;
|
|
}
|
|
|
|
val = (voltage_uv | ref_bit_msk);
|
|
|
|
ret = st->write(st, cmd, 0, !!val);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
return 0;
|
|
|
|
error_disable_reg:
|
|
if (!IS_ERR(st->reg))
|
|
regulator_disable(st->reg);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ad5686_probe);
|
|
|
|
int ad5686_remove(struct device *dev)
|
|
{
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
struct ad5686_state *st = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
if (!IS_ERR(st->reg))
|
|
regulator_disable(st->reg);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ad5686_remove);
|
|
|
|
MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
|
|
MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
|
|
MODULE_LICENSE("GPL v2");
|