linux/drivers/gpu
Michal Wajdeczko 9128b10249 drm/i915/guc: Limit number of scratch registers used for H2G
We wrongly assumed that GuC is only using last scratch register
for G2H messages, but in fact it is also using register [14] to
report sleep state status. Remove that register from our H2G
send registers pool.

v2: No message from host to GuC uses more than 8 registers and
the GuC FW itself uses an 8-element array to store the H2G message,
so we may reduce our send array to just 8 registers (Daniele)
v3: use explicit define (Daniele)
v4: and explicit comment (Daniele)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181019101725.14024-1-michal.wajdeczko@intel.com
2018-10-22 12:36:49 +01:00
..
drm drm/i915/guc: Limit number of scratch registers used for H2G 2018-10-22 12:36:49 +01:00
host1x gpu: host1x: Check whether size of unpin isn't 0 2018-07-09 10:31:30 +02:00
ipu-v3 drm pull for 4.19-rc1 2018-08-15 17:39:07 -07:00
vga vga_switcheroo: set audio client id according to bound GPU id 2018-07-17 11:12:00 +02:00
Makefile